Crays ranf and see 28 initial seed x left sequence

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Unformatted text preview: a vector length of 64, for example, you will need a vector of (a a2 a3 : : : a64). Race your vectorized version of ranf() vs. Cray's ranf(), and see 28 Initial Seed x Left Sequence ● XL,n+1 = aL XL,n + cL L(x) L2(x) ● ● ● L3(x) XR,n+1 = aR XR,n+ cR ● ● ● Right Sequences ● LR(x) RL(x) ● RL2(x) LRL(x) ● ● R2L(x) R(x) L2R(x) ● ● ● R2(x) ● RLR(x) LR2(x) R3(x) ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● Figure 7: Tree Generated from OLeftO and ORightO Generator how close you can come to their execution time. To do this, you will have to generate long vectors of random numbers, and use them elsewhere in the code. Use second() to obtain elapsed CPU time. Exercise 9: Leap-ahead in an LCG For the LCG, Xn+1 = aXn + c, where c 6= 0, determine ak and ck so that Xn+k = ak Xn + ck , ^ ^ ^ ^ resulting in a leap-ahead of k places on the original LCG cycle. 6 Lagged Fibonacci Generators Lagged Fibonacci pseudo-random number generators have become increasingly popular in recent years. These generators are so named because of their similarity to the familiar Remarks 29 Fibonacci sequence: 1 1 2 3 5 8 13 : : : de ned by: Xn = Xn;1 + Xn;2 where the rst two values, X0 and X1, must be supplied. This formula is generalized to give a family of pseudo-random number generators of the form: Xn = Xn;` + Xn;k (mod m) where ` > k > 0 and where, instead of two initial values, ` initial values, X0, ... , X`;1 , are needed in order to compute the next sequence element. In this expression the \lags" are k and `, so that the current value of X is determined by the value of X k places ago and ` places ago. In addition, for most applications of interest m is a power of two. That is, m = 2M . (This type of pseudo-random number generator, along with several others, has been extensively tested for randomness properties by Marsaglia Marsaglia, 1985] and has been given high marks. The only de ciency found was related to what he calls the Birthday Spacings test, for low values of ` and k. The interested reader is referred to Marsaglia, 1985.) With proper choice of k, `, and the rst ` values of X , the period, P , of this generator is equal to (2` ; 1) 2(M ;1). Proper choice of ` and k here means that the trinomial x` + xk + 1 is primitive over the integers mod 2. The only condition on the rst ` values is that at least one of them must be odd. Using the notation LFG(` k M ) to indicate the lags and the power of two modulus, examples of two commonly used versions of these generators are: 1) LFG(17 5 31): ` = 17, k = 5, M = 31 ) P 247 2) LFG(55 24 31): ` = 55, k = 24, M = 31 ) P 285 Obviously, the value of the modulus, m, does not by itself limit the period of the generator, as it does in the case of an LCG. Note also that lagged Fibonacci pseudo-random number generation is computationally simple: an integer add, a logical AND (to accomplish the mod 2M operation), and the decrementing of two array pointers are the only operations required to produce a new random number X . Furthermore, with a large enough value of k, limited vectorization can be achieved. The major drawback in the case of this type of generator is the fact that ` words of memory must be kept current. An LCG requires only one: the last value of X generated. We now look at some of the theory of these generators, with a view toward ensuring their proper use. Conceptually, a Fibonacci generator acts the same as a linear shift register, and if we set M = 1 so that m = 21 , then we have a binary linear shift register. Figure 8 is a diagram of a particular binary linear shift register, where ` = 10, k = 7, and every Xj is either a 1 or a 0. (We will use this choice of ` and k in several examples in order to illustrate in a non-trivial way some of the properties of this type of generator.) The arrows are there to depict the motion of the shift register as it makes the transition from one state to the next. This is called advancing the register. Two such advances are shown in Figure 9. 30 Addition mod 2 X(n-10) X(n-9) bit 9 bit 8 X(n-8) X(n-7) bit 7 bit 6 X(n-6) X(n-5) bit 5 bit 4 X(n-4) X(n-3) X(n-2) X(n-1) bit 3 bit 2 bit 1 bit 0 Figure 8: State Transition Diagram for Binary Shift Register If we set m equal to a higher power of two, say m = 24, i.e., M = 4, then the single-bit values of the X 's in Figure 8 will instead be represented by M bits each. Figure 10 is a diagram of the mod-16 linear shift register associated with the equation Xn = Xn;10 + Xn;7 (mod 24) In looking at this more general Fibonacci generator, LFG(10 7 4), two things are worth noting: 1. If we look for a moment at only the least signi cant bits of the elements in this register, that is, only those bits in the bottom row, then we see that the behavior of this row is una ected by bits in the higher rows. The contents of the bottom row will therefore be indistinguishable from those of the binary shift register in Figure 8. This is no surprise | when we add two numbers, the answer in the one's place does not depend in any way on the dig...
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