This is to say that if the rst values of x are all

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Unformatted text preview: its in the ten's place (here, the two's place). 2. If the bottom row of bits is all zeros, then no amount of register motion can produce any ones there. This is to say that if the rst ` values of X are all chosen to be even, then there can be no subsequent X values that are odd when the register is advanced. In such a case the pseudo-random number generator will not be of full period. The period can be no larger | and may be smaller | than P=2, since all odd numbers will be excluded. Since the state transformation of the shift register contents is a linear operation, a matrix equation describing it can be given. Continuing with the example of the 10-long generator, Remarks Addition mod 2 1 1 0 1 0 0 1 0 1 0 1 0 1 0 0 1 0 1 0 0 0 1 0 0 1 0 1 0 0 1 Figure 9: XXX if we de ne x and A by: 0 Xn;1 1 00 0 0 0 B Xn;2 C B1 0 0 0 B B B Xn;3 C C B0 1 0 0 B C B BX C B0 0 1 0 B n;4 C B B C B B Xn;5 C B C and A = B 0 0 0 1 B x = B Xn;6 C B0 0 0 0 B C B B C B B Xn;7 C B0 0 0 0 B C B B Xn;8 C B0 0 0 0 B C B B C B @ Xn;9 A @0 0 0 0 Xn;10 0000 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 11 0C C 0C C C 0C C 0C C C 0C C 0C C C 0C C 0A 0 31 32 Addition mod 16 word 0 word 1 word L-1 m.s.b. l.s.b. X(n-10) X(n-9) X(n-8) X(n-7) X(n-6) X(n-5) X(n-4) X(n-3) X(n-2) X(n-1) Figure 10: Register Motion for LFG(10,7,4) then the action of the shift register can be readily described by the equation xn = Axn;1 (mod 2M ) where xn is the entire vector after n time steps. If the vector x0 has been given some initial set of values, then we have, x1 = Ax0 x2 = Ax1 = A2x0 x3 = Ax2 = A2x1 = A3x0 etc. and in general, xn = An x0 : As an aside, note that xP = AP x0 = xP , or AP = I , the identity matrix. The above equation gives a way to leap the generator ahead, similar in fashion to the leap ahead concept discussed for LCGs. But such an operation with a Fibonacci generator Remarks 33 requires a matrix-vector multiply involving, at best, the precomputation of possibly many multiples of A. This precomputation may be expensive, even for small values of ` (recall that A is ` `), and may be prohibitive for large values of `. Leaping a Fibonacci generator ahead is therefore not recommended. This does not mean that such a generator cannot be \split," however. We now look at an e cient method for splitting a Fibonacci generator. Before explaining the splitting technique, notice that the period, P , of a properly constructed Fibonacci generator is (2` ; 1)2M ;1 . Consider a given initial set of values of an M -bit, `-long Fibonacci register. This state is a particular (M `) bit pattern in the rectangular register. If the register is advanced P times, the initial pattern will be replaced by P ; 1 di erent patterns before the initial one reappears. But the number of possible bit patterns in the register is 2M ` , a number far larger than P . This tells us that there are many P -long cycles that are independent of one other and can be generated from the same LFG(` k M ) structure. The number of such full-period cycles is 2(`;1)(M ;1) Mascagni, et al., 1994]. For example, with the LFG(10 7 4) generator of our previous example, there are 227 separate full-period cycles and a much smaller number of less than full-period cycles (218 + 29 + 1, to be precise). The question now becomes, how do we initialize separate cycles? This problem is addressed by Mascagni, et al. Mascagni, et al., 1994], where they describe a canonical form for initializing Fibonacci generators. This canonical form is determined by ` and k, but is independent of M . To understand the use of this canonical form, consider a second view of the LFG(10 7 4) register shown in Figure 11. The L-shaped region along the left column and the bottom row is xed with all zeros, except for a one in the least signi cant bit of word 7 (the word associated with Xn;8 ). The remaining bits, those in the (9 3)-bit rectangular region lled with z's, are free to be chosen in any combination. Each combination of bits in the (9 3) area will generate a distinct cycle of pseudo-random numbers. In other words, every possible bit pattern that can be put in the canonical form will occur in one and only one full period cycle. In general, the canonical form for initializing Fibonacci generators requires that word (` ; 1) be set to all zero bits and that the least signi cant bits of all words in the register to be set to zero, with the exception of one or two characteristic bits that depend on ` and k. As shown in Figure 11, the canonical form for the LFG(10 7 4) generator requires the least signi cant bit of word 7 to be set to one, with all other least signi cant bits in the register set to zero. Table 4 lists, for several choices of LFG(` k M ), the characteristic word (or words) for which the least signi cant bit should be set to one in order to be in canonical form. Two caveats with respect to the use of this canonical form should be mentioned at this point. Suppose a user were to construct and initialize a number of generators using an initialization scheme tha...
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This document was uploaded on 01/28/2014.

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