11_interface

Michelsen 5 winter 2008 see

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Unformatted text preview: A data Device B data held static for some interval Winter 2008 slide courtesy E. Michelsen 5 Winter 2008 see http://www.beyondlogic.org/index.html#PARALLEL UCSD: Physics 121; 2008 6 UCSD: Physics 121; 2008 Parallel Port Pinout Parallel Port Access • Most PCs have a DB-25 female connector for the parallel port • Usually at memory address 0x378 • Windows 98 and before were easy to talk to serial port parallel port – but after this, a hardwareabstraction layer (HAL) which makes access more difficult – one option is to fool computer into thinking you’re talking to a normal LPT (printer) device – involves tying pins 11 and 12 to ground • Straightforward on Linux – direct access to all pins Winter 2008 Lecture 11 7 Winter 2008 8 2 Computer Interface 02/21/2007 UCSD: Physics 121; 2008 UCSD: Physics 121; 2008 Serial Communications Time Is of the Essence • • • • • – we’ll get to these definitions later – often COM1 on a PC • In most cases, it is sufficient to use a 2- or 3-wire connection – ground (pin 5) and either or both receive and transmit (pins 2 and 3) With separate clock and data, the transmitter gives the receiver timing g ives the on one signal, and data on another Requires two signals (clock and data): can be expensive Data values are arbitrary (no restrictions) Used by local interfaces: V.35, (synchronous) EIA-232, HSSI, etc. As distance and/or speed increase, clock/data skew destroys timing clock/data destroys sample on rising edge of clock • Other controls available, but seldom used • Data transmitted one bit at a time, with protocols establishing how one represents data • Slow-ish (most common is 9600 bits/sec) clock • Most PCs have a DB9 male plug for RS-2...
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This note was uploaded on 01/30/2014 for the course PHYS 121 taught by Professor Staff during the Winter '08 term at UCSD.

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