Lecture29_30_12.2SRAM_cell_sizing_posted(1)

Q1 m1 m3 m5 m4 m2 and m6 are in cut off is also cut

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Unformatted text preview: Read-stability ================= - Assume Q=0, !Q=1 M1 M3 M5 M4 M2 and M6 are in CUT-OFF is also CUT-OFF pulling !Q to V_DD is in SATURATION is in TRIODE [Drawing] Thus, the READ operation only involves M2, M4 and bitline BL: I_D4 I_D2 = 1/2•µ_n•C_ox•(W/L)4•(V_DD - V_Q - V_tn)^2 = µ_n•C_ox•(W/L)2•[(V_DD-V_tn)•V_Q - 1/2•V_Q^2] During a READ, both M2 and M4 draw current and so V_Q rises above ground. Read stability is achieved by ensuring V_Q remains low enough that the latch does not toggle its state. Thus size M2 and M4 such that V_Q <= V_tn I_D4 = 1/2•µ_n•C_ox•(W/L)4•(V_DD - V_Q - V_tn)^2 = 1/2(0.2)(W/L)4•(2.5-0.5-0.5)^2 = 0.225(W/L)4 Eq. 1 I_D2 = µ_n•C_ox•(W/L)2•[(V_DD-V_tn)•V_Q - 1/2•V_Q^2] = (0.2)(W/L)2•[(2)0.5 - 0.5^2/2)] = 0.2*7/8•(W/L)2 = 0.175(W/L)2 Setting I_D4 = I_D2 0.225(W/L)4 = 0.175(W/L)2 1.3(W/L)4 <= (W/L)2 (with M1 and M3 identical to M2 and M4 by symmetry) - Making M2 wider lowers V_Q 2) Sizing for READ speed Speed of READ operation determined by discharging of bitline capacitance C_BL. Must wait until the differential voltage is large enough to determine which bitline was pulled low I_D4 = C_BL ∆v/∆t Thus if C_BL=1pF and we want...
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This document was uploaded on 02/03/2014.

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