chapter3-m1-ziavras

May be wasted because of branches jumps trying to

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Unformatted text preview: l in the pipeline Control hazards: Fetched instrs. may be wasted because of branches & jumps Trying to increase the ideal IPC (instructions per cycle) increases the importance of dealing with structural, data & control hazards S. Ziavras ILP (3) • • Amount of parallelism available within a basic block straight block (a straight-line code sequence with no code sequence with no branches in except to the entry & no branches out except at the exit) is quite small – Typical MIPS programs: 4-7 instrs. execute MIPS programs: instrs. execute between a pair of consecutive branches Because of many data dependencies among intra-block instrs. actual parallelism even less To obtain substantial performance enhancements, we must exploit ILP across multiple basic blocks Major techniques in next figure S. Ziavras Technique Technique Forwarding & Bypassing Delayed branches & simple branch scheduling Basic dynamic scheduling (scoreboarding) Dynamic scheduling with scheduling with...
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This document was uploaded on 02/09/2014.

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