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Unformatted text preview: ime varies by operand location
• Memory-memory computer
NOT USED anymore
– Most compact code. Large # of instr. formats
compact code. Large of instr. formats
* GPR: General-Purpose Register
Some material is adapted from D. Culler & D. Patterson (UCB) S. Ziavras Memory Addressing
How is a memory address interpreted?
Byte (8 bits), half word (16), word (32), double word (64)
• Byte order in a larger data object
larger data object – Little Endian: byte with address “x…x000” stored in least-significant
position/byte (LSB) in double word (the little end) – Big Endian
Endian 7 6 1 0 MSB (high
address) 1 6 LSB (low
7 Accesses in many computers must be byte aligned to
reduce hardware complexity in memory
hardware complexity in memory
Some material is adapted from D. Culler & D. Patterson (UCB) S. Ziavras Memory Addressing (2)
Memory Addressing (2)
• Given a 32-bit hex. value: 45A24B56 Mem.
Addr. Big-endian 5670 45 5670 56 5671 A2 5671 4B 5672
56 Mem. Little-endian
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This document was uploaded on 02/09/2014.
- Fall '09