Unformatted text preview: wed as short vector
» Intel MMX: 64 bits (8 8-bit, 4 16-bit or 2 32-bit
» PowerPC AltiVec: 128 bits (vectors twice that length)
» Intel extension for 128-bit vectors: new set of instrs.
extension for 128
vectors new set of instrs
(SSE: Streaming SIMD Extension) • SIMD: Single-Instruction Multiple-Data
• Other exec. modes: SISD (uniprocessor), MIMD (independ.
processors), MISD (pipelining?, systolic array?)
Some material is adapted from D. Culler & D. Patterson (UCB) S. Ziavras AMD Bulldozer (10/2011)
• Intel's Advanced Vector Extensions (AVX)
256-bit floating point
• SSE4.1, SSE4.2, AES: Advanced Encryption
Standard, CLMUL: Carry-Less Multiplication
(Intel 2008) ISA extension for block cipher
encryption in Galois/Counter Mode
• future 128-bit AMD instruction sets (XOP,
FMA4 and CVT16) with similar functionality to
the AMD SSE5 instruction set
• 2 128-bit FPUs can be combined to form a
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This document was uploaded on 02/09/2014.
- Fall '09