Unformatted text preview: h respect to all earlier Ls
S. Ziavras HW Design Considerations for Speculation
Register renaming vs. reorder buffers
Instead of ROB, explicitly use larger physical set of
regs. combined with reg. renaming
All results are allocated a new virtual reg. until
results are allocated new virtual reg.
PowerPC 603/604 series, MIPS R10000/12000, Alpha
21264, Pentium II/III/4
– Reg. renaming adding 20-80 extra regs. S. Ziavras HW Design Considerations for Speculation (2)
How much to speculate
• Significant disadvantage of speculation: processor may
speculate that some costly exceptional event occurs &
begin processing event, when in fact speculation was
– Most pipelines with specu...
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This document was uploaded on 02/09/2014.
- Fall '09