chapter5-m3-ziavras

1 what architecture would very large scale

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Unformatted text preview: rocessor architecture • SGI OS protects the page table data structure with single lock assuming that page with a single lock, assuming that page allocation is infrequent • Suppose a program uses a large number of pages that are initialized at start-up • Program parallelized so that multiple processes allocate the pages • But page allocation requires lock of page table data structure, so even an OS kernel that allows multiple threads will be serialized at multiple threads will be serialized at initialization (even if separate processes) 59 Answers to 1995 Questions about Parallelism In the 1995 edition of this text, there was a discussion of two then/current controversial issues. 1. What architecture would very large scale, microprocessor-based multiprocessors use? Answer 1. Large scale multiprocessors did not become a major and growing market ⇒ clusters of single microprocessors or moderate SMPs 2. What was the role for multiprocessing in the future of microprocessor architecture? Answer 2. Astonishingly clear. For at least for the clear For at least for the next 5 years, future MPU performance comes from the exploitation of TLP through multicore processors vs. exploiting more ILP processors vs. exploiting more ILP • 60 Cautionary Tale • Key to success of birth and development of ILP in 1980s and 1990s was SW in the form of optimizing 1980s and 1990s was SW in the form of optimizing compilers that could exploit ILP • Similarly, successful exploitation of TLP will depend as much on the development of suitable th SW systems as it will on the contributions of computer architects • Given the slow progress on parallel SW in the past 30+ years, it is likely that exploiting TLP broadly will remain challenging for years to come 61 And in Conclusion … • Caches contain all information on state of cached memory blocks • Snooping cache over shared medium for smaller MP by invalidating other cached copies on write • Sharing cached data ⇒ Coherence (values cached data returned by a read), Consistency (when a written value will be returned by a read) • Snooping and Directory Protocols similar; bus and Directory Protocols similar; bus makes snooping easier because of broadcast (snooping => uniform memory access) • Directory has extra data structure to keep track extra data structure to keep track of state of all cache blocks • Distributing directory => scalable shared address multiprocessor address multiprocessor => Cache coherent, Non uniform memory access 62...
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