chapter5-m3-ziavras

Back remote cache home directory a data write back a

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Unformatted text preview: directory; the block at address and send it to its home directory; change the state of A in the remote cache to shared Fetch/Invalidate Home directory Remote cache A – Fetch the block at address A and send it to its home directory; y; invalidate the block in the cache Data value reply Home directory Local cache Data – Return a data value from the home memory (read/write miss response) Data write back Remote cache Home directory A, Data – Write back a data value for address A (owner wants to replace block) 26 State Transition Diagram for One Cache Block in Directory Block in Directory-Based System System • States identical to snoopy case; transactions very similar transactions very similar. • Transitions caused by read misses, write misses, invalidates, data fetch requests • Generates read miss & write miss msg to home directory. • Write misses => misses => – explicit invalidate & – data fetch requests. fetch requests. • Note: on a write, a cache block is bigger, so need to read the full cache block 27 CPU -Cache State Machine • State machine for CPU requests for each each CACHE block • Invalid state if in memory Invalidate Invalid Fetch/Invalidate send Data Write Back message to home directory Shared (read/only) CPU Read Send Read Miss message CPU read miss: read miss: CPU Write: Send Read Miss Send Write Miss CPU Write: Send msg to h.d. Write Miss message to home directory Exclusive (read/write) CPU read hit read hit CPU write hit...
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This document was uploaded on 02/09/2014.

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