chapter5-m3-ziavras

Here p processor number a address physical address

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: y 3 processors involved typically processors involved – Local node where a request originates – Home node where the memory location & the directory entry of an address resides* – Remote node has a copy of a cache block whether exclusive block, whether exclusive or shared shared • Example messages here: P = processor number, A = address • Physical address space is statically distributed (high order bits may represent node #) 23 Computers in the News • “Core” new microarchitecture; last Pentium 4 (2000) – Wide Dynamic Execution: 4 issue + Combine 2 simple Dynamic Execution: issue Combine simple instructions into 1 powerful (“macrofusion”) – Advanced Digital Media Boost: All SSE instructions 1 clock cycle – Smart Memory Access: lets one core control the whole cache when the other core is idle and governs how the same data can when the other core is idle, and governs how the same data can be shared by both cores – Intelligent Power Capability: shut down unneeded portions of chip • 80% more performance, 40% less power • 4 core chips in 2007 (2 copies of...
View Full Document

Ask a homework question - tutors are online