CPE 151 quiz 9

Choose one answer a large clock skew b small flip flop

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: 8 1/ 3 11/ 25/ 12 EEE 234/ C pE 151: Quiz 8 - VLSI c loc k ing d. None of these e. Increasing the clock frequency Correct Mark s for this s ubmis s ion: 2/2. W ith previous penalties this gives 0/2. His tory of Res pons es : # Action Response Time Raw score Grade 1 Grade Sm all flip- flop clk- to- Q delays 11:19:30 on 25/11/12 0 0 2 Grade None of thes e 11:19:47 on 25/11/12 0 0 3 Grade Increas ing the clock frequency 11:19:50 on 25/11/12 2 0 4 Close&Grade Increasing the clock frequency 11:21:37 on 25/11/12 2 0 Hold time violations occur more often and are harder to correct than setup time violations. Mark s : 3 0/2 Answer: True False Incorrect Mark s for this s ubmis s ion: 0/2. His tory of Res pons es : # Action Raw score Grade True 11:20:38 on 25/11/12 0 0 2 Close&Grade Mark s : 0/2 Time 1 Grade 4 Response True 11:21:37 on 25/11/12 0 0 Clock trees are used to reduce delay for clocks distributed long distances across...
View Full Document

Ask a homework question - tutors are online