CPE 151 quiz 12

1 answer incorrect correct answer 3 mark s for this

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: chip b. Allows a chip’s clock frequency to be increased c. None of these d. Reduces the power used by a chip e. Reduces the probability of hold time violations c li. ec s . c s us . edu/ m od/ quiz/ rev iew. php?q=14&at t em pt =26923 1/ 3 11/ 25/ 12 EEE 234/ C pE 151: Quiz 8 - VLSI c loc k ing Correct Mark s for this s ubmis s ion: 2/2. W ith previous penalties this gives 0/2. His tory of Res pons es : # Action Response Time Raw score Grade 1 Grade Reduces the probability of hold tim e violations 11:29:00 on 25/11/12 0 0 2 Grade Reduces the power us ed by a chip 11:29:03 on 25/11/12 0 0 3 Grade Allows a chip’s clock frequency to be increas ed 11:29:07 on 25/11/12 2 0 11:30:50 on 25/11/12 2 0 4 Close&Grade Allow s a chip’s clock frequency to be increased Clock trees are used to reduce delay for clocks distributed long distances across a chip. Mark s : 3 0/2 Answer: True False Incorrect Mark s for this s ubmis s ion: 0/2. His tory of Res pons es : # Action Response Time Raw score Grade 1 Grade True 11:30:42 on 25/11/12 0 0 2 Close&Grade True 11:30:50 on 25/11/12 0 0 A clock is routed to a flip- flop through a 621μm long wire which is found to h...
View Full Document

{[ snackBarMessage ]}

Ask a homework question - tutors are online