SandToSilicon32nm

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Unformatted text preview: conducted before the finished product is shipped. 12 Copyright © 2011, Intel Corporation. All rights reserved. Intel, Intel logo and Intel Core are trademarks of Intel Corporation in the U.S. and other countries. Wafer Sort Test / Slicing Wafer Sort Test – scale: die level (~10mm / ~0.5 inch) This fraction of a ready wafer is being put to a first functionality test. In this stage test patterns are fed into every single chip and the response from the chip monitored and compared to “the right answer”. 13 Wafer Slicing – scale: wafer level (~300mm / 12 inch) The wafer is cut into pieces (called dies). The above wafer contains 2nd generation Intel® Core™ i5 processors with integrated Intel HD Graphics. Discarding faulty Dies – scale: wafer level (~300mm / 12 inch) The dies that responded with the right answer to the test pattern will be put forward for the next step (packaging). Copyright © 2011, Intel Corporation. All rights reserved. Intel, Intel logo and Intel Core are trademarks of Intel Corporation in the U.S. and other countries. Packaging Individual Die – scale: die level (~10mm / ~0.5 inch) These are individual dies which have been cut out in the previous step (slicing). The dies shown here are dies of a 2nd generation Intel® Core™ i5 Processor. 14 Packaging – scale: package level (~20mm / ~1 inch) The substrate, the die and the heatspreader are put together to form a completed processor. The green substrate builds the electrical and mechanical interface for the processor to interact with the rest of the PC system. The silver heatspreader is a thermal interface where a cooling solution will be put on to. This will keep the processor cool during operation. Processor – scale: package level (~20mm / ~1 inch) Completed processor (2nd generation Intel® Core™ i5 Processor in this case). A microprocessor is the most complex manufactured product on earth. In fact, it takes hundreds of steps – only the most important ones have been visualized in this picture story...
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This note was uploaded on 02/16/2014 for the course EECS 40 taught by Professor Chang-hasnain during the Spring '08 term at University of California, Berkeley.

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