The chemical reaction triggered by that process step

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Unformatted text preview: esist finish is exposed to ultra violet (UV) light. The chemical reaction triggered by that process step is similar to what happens to film material in a film camera the moment you press the shutter button. The photo resist finish that’s exposed to UV light will become soluble. The exposure is done using masks that act like stencils in this process step. When used with UV light, masks create the various circuit patterns on each layer of the microprocessor. A lens (middle) reduces the mask’s image. So what gets printed on the wafer is typically four times smaller linearly than the mask’s pattern. Exposure – scale: transistor level (~50-200nm) Although usually hundreds of microprocessors are built on a single wafer, this picture story will only focus on a small piece of a microprocessor from now on – on a transistor or parts thereof. A transistor acts as a switch, controlling the flow of electrical current in a computer chip. Intel researchers have developed transistors so small that about 30 million of them could fit on the head of a pin. Copyright © 2011, Intel Corporation. All rights reserved. Intel, Intel logo and Intel Core are trademarks of Intel Corporation in the U.S. and other countries. Etching Washing off of Photo Resist – scale: transistor level (~50-200nm) The gooey photo resist is completely dissolved by a solvent. This reveals a pattern of photo resist made by the mask (dark rectangle here). 9 Etching – scale: transistor level (~50-200nm) The photo resist is protecting the high-k dielectric that should not be etched away. Revealed material will be etched away with chemicals. Removing Photo Resist – scale: transistor level (~50-200nm) After the etching the photo resist is removed and the desired shape becomes visible. Copyright © 2011, Intel Corporation. All rights reserved. Intel, Intel logo and Intel Core are trademarks of Intel Corporation in the U.S. and other countries. Metal Deposition Ready Transistor – scale: transistor level (~50-200nm) This transistor is close to being finished. Three holes hav...
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This note was uploaded on 02/16/2014 for the course EECS 40 taught by Professor Chang-hasnain during the Spring '08 term at University of California, Berkeley.

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