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ECE559_Fall2009_Exam1_Solution

# Dt i t c l dvout dt n g i r g h a c g n i r u a d t u

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Unformatted text preview: s discharged to 0. Edissipated ,1→0 = ∫ i (t ) Vout dt = ∫ 0 1 2 CLVDD 2 −C LVout dVout = VDD So total energy dissipated Etotal = Edissipated ,1→0 + Edissipated ,0→1 = 1 1 2 2 2 C LVDD + CLVDD = C LVDD 2 2 Putting CL = 20f F and VDD = 1 V, Edissipated,total = 20 f Joule . Assume A = 1 V and B = 0. s t n i o p 5 D V t 0 ) b t r a P 1 [ 1 V = D D V 0 / 2 6 e - 0 3 x o C p ’ = / 2 A V A 6 e - 0 µ 6 x V o C n 3 . 0 n = µ 3 t V , V . 0 2 K L / W B A = ’ = V p = n 2 K L = - p = / W = t t u o V V F f 0 2 L 1 C L = / W 1 A = A V = B 0 V B 3 L = Page 4 of 13 o D The voltage at the supply terminal is switching from / W = Exam 1 ECE 559 (Fall 2009), Purdue University When the inputs A = 1 V and B = 0, the PMOS network gets ON and current is drawn from supply that charges the output node capacitance CL to VDD. Energy drawn from source EVDD = ∫ i (t ) VDD dt = ∫ VDD 0 2 CLVDD dVout = C LVDD . Energy stored in the capacitor CL, Estored ,CL = ∫ i (t ) Vout dt = ∫ VDD 0 1 2 CLVDD . 2 C LVout dVout = So, Edissipated ,0→1 = EVDD − Estored ,CL = 1 2 CLVDD . 2 Putting CL = 20f F and VDD = 1 V, Edissipated = 10 f Joule : s t n i o p 0 2 m e l b o r P 3 [ so that VOL = 0.2 V. VOL represents the output low voltage. Clearly state all of your assumptions. R f o e u l a v m u m i n i m For the circuit shown below, find the ) a t r a P What will be the VOH? VOH represents the output high voltage. Explain your answer. s t n i o p 5 1 [ Page 5 of 13 V V 2 / A 6 - e 0 V 3 . = 0 = 4 n µ x o C V Page 6 of 13 VDD − VOL 1 − 0.2 0.8 = = . R R R 2 IR = = 4 L / B W I B = 1 L / x W V C = 4 C V 2 t . = 0 O L I A / W A I V L B A I = n ’ n K R I R V = D D V 1 r e s w n A = 4 L / W B = 1 L / W C = 4 V = 3 A 6 - e 0 4 n µ x o C V 0 . = / L / W A V t t u o = n ’ n K R V = D D V 1 Exam 1 ECE 559 (Fall 2009), Purdue University Exam 1 ECE 559 (Fall 2009), Purdue University IR has to be equal to the current flowing through the NMOS network as they are serially connected, i.e. I R = I NMOS = I AB + I C . To get the , IR has to be maximum, i.e., INMOS has to be maximum. The output low voltage is achieved when A = B = 1 or C = 1 and of course when A = B = C = 1. Accordin...
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