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Unformatted text preview: the result. Assume the following parameters and P 5 2 c m s t L=240nm, Wp =1250nm, Wn =450nm, VDD = 2.5 V.
T U O and . X T U O Also, connect a 20f F capacitance at both the nodes : m 2 e l b o r P Consider the same 2-input NAND gate as in the problem 1. Assume that the
substrates for all the PMOSs and NMOSs are connected to VDD and ground, respectively.
T U O Wp/Lp = 2 Wn/Ln = 2. 2 t u o V Determine the output voltage, (without body effect) . Without body effect
With body effect b a l t a m . i
i i You may think of using to solve your equations. )
P X T U O T U O ∆VT ,body _ effect = k1. ( ) 2φ f − VBS − 2φ f − k 2.VBS Page 2 of 3 t 5 2 c m s t The body-effect is modeled in SPICE as follows. s . m and c Also, connect a 20f F capacitance at both the nodes 2 L=240nm, Wp =1250nm, Wn =450nm, VDD = 2.5 V, Vin1 = Vin2 = 1.25 V. 5 Do a SPICE simulation with the libraries that you have used in Tutorial 2, i.e.,
. Assume the following parameters N a |2φf| = 0.6 V Vtn = 0.3 V
γ = 0.4 V O Kn’ = µnCox = 60e-6 A/V Vtp = -0.3 V for this part. Vin1 = Vin2 = 0.5 V Kp...
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This note was uploaded on 02/19/2014 for the course ECE 559 taught by Professor Staff during the Fall '08 term at Purdue.
- Fall '08