Unformatted text preview: depending on different input vector
combinations applied to the inputs of the gate. Consider a 2-input NAND gate. Explain for which
input combinations, the
g g and N 5 2 c m s n i l l a f m u m i x a m g n i s i n i r l l a m f g u m i x a n i s i r m Perform SPICE simulation with the libraries that you have used in lab, i.e.,
to confirm your answer. Use L = 300 nm, VDD = 2.5 V. t P 5 2 ) c m c t s r a t P so that the
. Clearly explain the procedure you
have followed. Submit the necessary plots showing the trade-off between propagation delays
and transistor widths.
t u p t u o - o t - t u p n i m u m i x a m s d...
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- Fall '08
- Integrated Circuit, Logic gate, Purdue University, propagation delays