Consider a 16 input or gate implemented in domino

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Unformatted text preview: k a e l e g r a h c P L = 300 nm, VDD = 2.5 V, Wpre-charge = 900 nm, Wevaluate = 450 nm, Widths of NMOSs in the PDN, WNMOS-PDN = 9000 nm. u m i x a and widths are 450 nm and 1800 nm, m m intervals. m m n 0 5 For any other transistors, allowed respectively. You should consider widths in u m i n i m : Determine (by hand calculation) the width of the keeper PMOS ensuring the of the gate. You can select the characteristics of the output inverter by your own . State your assumptions, if any. Use the following information. t c e r r o ) a t r a P c y n o i t a t i n f l a a n o i t c n u w l p x e h t i Kp’ = µpCox = 300e-6 A/V2 Kn’ = µnCox = 600e-6 A/V Vtp = -0.5 V 2 Vtn = 0.5 V. ) b t r a P Perform SPICE simulation to determine the width of the keeper PMO...
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