You should consider widths in intervals m u m m n i x

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: ion (ratio of the widths of pull-down NMOS and access transistor) for read (ratio of the widths of pull-up PMOS and access transistor) for write o i t o a i r t a p r u l - l l l e u i) ii) C P Write the regions of operation of all the transistors for both i) and ii). from the SPICE library that you t c a r t x e Any extra parameter that you might need, you should are using. ) b t r a P Size the transistors in the SRAM cell to have the . By SPICE simulation, determine the (SNM) of the SRAM cell. (SNM is defined as the minimum noise voltage present at each of the cell storage nodes necessary to flip the state of the cell.) Explain the procedure you have followed. y t i l i b a t s d a e r m u m i x a m n i Page 1 of 2 g r a m e s i o n c i t a t s Homework 6 ECE 559 (Fall 2009), Purdue University ) c t r a P What happens to the write operation for the cell? If write operation fails, size the transistors in such a way that it’s at the verge of satisfying the write operation. By SPICE simulation, determine the (SNM) of the SRAM cell. Explain the procedure you have followed. n i g r a m e s i o n c i t a t s Compare SNM for this part with that of part b). Explain if the result is according to your expectation or not. Page 2 of 2...
View Full Document

This note was uploaded on 02/19/2014 for the course ECE 559 taught by Professor Staff during the Fall '08 term at Purdue.

Ask a homework question - tutors are online