It is impossible to design a protocol thats both safe

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Unformatted text preview: •  CPU0's writes of v0 and done0 may be interchanged by network •  Leaving v0 unset but done0=true •  But assume each CPU sees each other's writes in issue order •  Yet another problem: •  CPU2 sees CPU1's writes before CPU0's writes •  i.e. CPU2 and CPU1 disagree on order of CPU0 and CPU1 writes Consistency Models •  There are no "right" or "wrong" models •  A model may make it harder or easier to program –  i.e. lead to more or less intui\ve results •  A model may be harder or easier to implement efficiently Strict Consistency •  Each instruc\on is stamped with the wall- clock \me at which it started across all CPUs •  Rule 1: Load gets value of most recent previous Set to same address •  Rule 2: each CPU's instruc\ons have \me- stamps in execu\on order •  Essen\ally the same as on uniprocessor Property of Strict Consistency •  Very intui\ve behavior •  But … •  Not efficiently enough Sequen\al Consistency •  Is an execu\on (a set of opera\ons) correct? •  There must be some total order of opera\ons such that –  Rule 1. All CPUs see results consistent with that total order i.e. reads see most recent write in the total order –  Rule 2. Each CPU's instruc\ons appear in- order in the total order Implemen\ng Sequen\al Consistency •  1. Each CPU to execute reads/writes in program order, one at a \me •  2. Each memory loca\on to execute reads/ writes in arrival order, one at a \me •  Proof in Lamport 1979 In what sense is sequen\al looser than strict? •  I.e. what are we giving up? •  I.e. what programs will break? •  Answer: sequen\al consistency doesn't let you reason about \ming. •  You *can* reason based on per- CPU instruc\on order and observed values: An Example •  •  •  •  •  CPU0: w(x)0 w(x)1 CPU1: w(y)0 w(y)2 CPU2: r(y)? r(x)? Strict consistency requires r(y)2 r(x)1 But sequen\al consistency allows either or both to read as 0 Causal Consistency •  Causal consistency: Any execu\on is the same as if all causally- related read/write ops were executed in an order that reflects their causality – All concurrent ops may be seen in different orders Eventual Consistency •  Allow stale reads, but ensure that reads will eventually reflect previously wri•en values –  Even aver very long \mes •  Doesn’t order concurrent writes as they are executed, which might create conflicts later: which write was first? •  Used in Amazon’s Dynamo, a key/value store – Plus a lot of academic systems – Plus file synchroniza\on Transac\ons •  ACID Proper\es: •  Atomicity: none or exactly once (2PC) •  Consistency:...
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This document was uploaded on 02/20/2014.

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