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lec5_timing_verification

# Timing p c mcgeer and r k brayton integrating

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Unformatted text preview: er, 1991. and a False paths of delay 3 e 1 23 1 d b c 1 1 g f 0 Spring 2014, Feb 5 . . . Spring ELEC 7770: Advanced VLSI Design (Agrawal) 10 Static Sensitization Condition x y z Off-path inputs There must exist an input vector (PI) that satisfies the following conditions: ∂y/∂x = 1, ∂z/∂y = 1, . . . Where ∂y/∂x = y(x=1, PI) ⊕ y(x=0, PI) is Boolean difference Spring 2014, Feb 5 . . . Spring ELEC 7770: Advanced VLSI Design (Agrawal) 11 An ATPG Method x y z Stuck-at-0 Path is false if this fault is redundant Spring 2014, Feb 5 . . . Spring ELEC 7770: Advanced VLSI Design (Agrawal) 12 Optimism and Pessimism Statically Dynamically sensitizable sensitizable Paths paths (optimistic) Structural paths analyzed by STA (pessimistic) Spring 2014, Feb 5 . . . Spring ELEC 7770: Advanced VLSI Design (Agrawal) 13 Theorem 1 Every statically sensitizable path is dynamically Every sensitizable. sensitizable. Proof: Since a vector exists to sensitize the path, Proof: if that vector does not specify the path input, then toggling the primary input at the origin of the path will propagate an event through the path. path. P. C. McGeer and R. K. Brayton, Integrating P. Functional and Temporal Domains in Logic Design, Springer, 1991, p. 35. D...
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