Cant write cant add 48s3 s2 32s3 2004 morgan kaufman

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Unformatted text preview: emember arithmetic operands are registers, not memory! Can’t write: Can’t add 48($s3), $s2, 32($s3) 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 14 Our First Example Can we figure out the code of subroutine? swap(int v, int k); { int temp; temp = v[k] v[k] = v[k+1]; v[k+1] = temp; } swap: sll $2, add $2, lw $15, lw $16, sw $16, sw $15, jr $31 $5, 2 $4, $2 0($2) 4($2) 0($2) 4($2) Initially, k is in reg 5; base address of v is in reg 4; Initially, return addr is in reg 31 return 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 15 What Happens? . . call swap . . . return address When the program reaches “call swap” statement: – Jump to swap routine Registers 4 and 5 contain the arguments (register convention) Register 31 contains the return address (register convention) – Swap two words in memory – Jump back to return address to continue rest of the Jump program program Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 16 Memory and Registers Memory byte addr. 0 4 8 12 . 4n . . . 4n+4k . Spring 2014, Jan 24 . . . Spring Word 0 Word 1 Word 2 Register 0 Register 1 Register 2 Register 3 v[0] (Word n) v[1] (Word n+1) Register 4 4n Register 5 k . . v[k] (Word n+k) v[k+1] (Word n+k+1) Register 31 ELEC 5200-001/6200-001 Lecture 3 Ret. addr. 17 Our First Example Now figure out the code: swap(int v, int k); { int temp; temp = v[k] v[k] = v[k+1]; v[k+1] = temp; } swap: sll $2, add $2, lw $15, lw $16, sw $16, sw $15, jr $31 $5, 2 $4, $2 0($2) 4($2) 0($2) 4($2) 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 18 So Far We’ve Learned MIPS — loading words but addressing bytes — arithmetic on registers only Instruction Meaning add $s1, $s2, $s3 sub $s1, $s2, $s3 lw $s1, 100($s2) $s1 = $s2 + $s3 $s1 = $s2 – $s3 $s1 = Memory[$s2+100] sw $s1, 100($s2) Memory[$s2+100] = $s1 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 19 Machine Language Instructions, like registers and words of data, are also 32 Instructions, bits long bits – Example: add $t1, $s1, $s2 Example: – registers are numbered, $t1=8, $s1=17, $s2=18 registers Instruction Format: 000000 10001 10010 01000 00000 100000 opcode rs rt rd shamt funct Can you guess what the field names stand for? 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 20 Violating Regularity for a Good Cause Times Square Grand Central Station Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 21 Machine Language Consider the load-word and store-word instructions, – What would the regularity principle have us do? – New principle: Good design demands a compromise Introduce a new type of instruction format – I-type for data transfer instructions – other format was R-type for register Example: lw $t0, 32($s2) Example: lw 35 18 9 opcode rs rt 32...
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This document was uploaded on 02/23/2014 for the course COMUPER AR 6200 at Auburn University.

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