Lec3_ISA

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Unformatted text preview: – only registers as arguments. Immediate (I)-type – arguments are registers and Immediate numbers (constants or memory addresses). numbers Jump (J)-type – argument is an address. Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 8 MIPS Arithmetic Instructions All instructions have 3 operands Operand order is fixed (destination first) Example: C code: code: a = b + c; MIPS ‘code’: add a, b, c “The natural number of operands for an operation like addition is three… requiring every instruction to have exactly three operands conforms to the philosophy of keeping the hardware simple” simple” 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 9 Arithmetic Instr. (Continued) Design Principle: simplicity favors regularity. Design Of course this complicates some things... Of C code: a = b + c + d; MIPS code: add a, b, c add a, a, d Operands must be registers (why?) Remember von Operands Neumann bottleneck. Neumann 32 registers provided 2004 © Morgan Kaufman Publishers Each register contains 32 bits Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 10 Registers vs. Memory Arithmetic instructions operands must be registers 32 registers provided Compiler associates variables with registers. What about programs with lots of variables? Must use What memory. memory. Control Input Memory Datapath Processor Output I/O 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 11 Memory Organization Viewed as a large, single-dimension array, with an Viewed address. address. A memory address is an index into the array. "Byte addressing" means that the index points to a byte "Byte of memory. of Byte 0 byte 1 byte 2 byte 3 32 bit word 8 bits of data 32 bit word 8 bits of data 32 bit word 8 bits of data 32 bit word 8 bits of data . 8 bits of data . . byte 4 Spring 2014, Jan 24 . . . Spring 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data byte 10 ELEC 5200-001/6200-001 Lecture 3 8 bits of data 8 bits of data 8 bits of data 8 bits of data 8 bits of data 2004 © Morgan Kaufman Publishers 12 Memory Organization Bytes are nice, but most data items use larger "words" For MIPS, a word contains 32 bits or 4 bytes. 0 4 word addresses 8 12 ... . 32 bits of data 32 bits of data 32 bits of data 32 bits of data 32 bits of data Registers hold 32 bits of data Use 32 bit address 32 232 bytes with addresses from 0 to 232 – 1 32 230 words with addresses 0, 4, 8, ... 232 – 4 Words are aligned Words i.e., what are the least 2 significant bits of a word address? 2004 © Morgan Kaufman Publishers Spring 2014, Jan 24 . . . Spring ELEC 5200-001/6200-001 Lecture 3 13 Instructions Load and store instructions Example: C code: A[12] = h + A[8]; MIPS code: lw $t0, 32($s3) #addr of A in reg s3 add $t0, $s2, $t0 #h in reg s2 sw $t0, 48($s3) Can refer to registers by name (e.g., $s2, $t2) instead of number Store word has destination last R...
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This document was uploaded on 02/23/2014 for the course COMUPER AR 6200 at Auburn University.

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