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Unformatted text preview: rategy, we can build a parameterized family of setassociative caches.
Each cache in this family implements 2S sets, where each set comprises 2N lines and
each line has a tag as well as 2B consecutive words of data from main memory as
depicted in the “big picture” view below: For each of the following questions, assume a machine that uses 2A word addresses (to keep it
simple, we avoid the byte addressing of the Beta; thus consecutive addresses differ by one). You
may answer each question by a number, or a formula involving the parameters A, B, N, and S.
(A) (1 point): What is the total number of data words that can be held in the cache? 2S+N+B Total cache size, in words: _________
(B) (1 point): What constraint on the above parameters characterizes a directmapped
cache? N=0
Specify constraint (equation or inequality) on above parameters: _______________
(C) (1 point): What constraint on the above parameters characterizes a fullyassociative
cache? S=0 Specify constraint (equation or inequality) on above parameters: _______________
(D) (2 points): What is the minimum number of bits required in the tag portion of each cache
line?
ASB
Size of each tag: _________
(E) (2 points): Assuming physical locations are cached in a virtual memory system whose
page size is 2P words, what constraint allows simultaneous pagemap and cache lookups? ! S+B P
Specify constraint (equation or inequality) on above parameters: _______________
END OF QUIZ!
6.004 Spring 2010  4 of 4  Quiz #4...
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This document was uploaded on 02/27/2014 for the course COMSCI 6.004 at MIT.
 Spring '13
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