q4 (1) Computer Structures

What is the physical address of the first instruction

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Unformatted text preview: ocation zero. What is the physical address of the first instruction executed after Gill’s modifications? Give a hex physical address, or “NONE” if you can’t tell from the information given. Physical address of first instruction, or “NONE”: 0x__________ (B) (1 point): How many entries are required for the pagemap? Number of pagemap entries: __________ (C) (2 points): How many pages of main memory are required to hold the pagemap? What fraction of physical memory is used to hold the pagemap? Physical pages to hold pagemap: __________ Fraction of physical memory used for pagemap: __________ For simplicity, Gill hasn’t implemented Resident or Dirty bits in the TLB. The TLB is assumed to contain entries only for resident pages, and all resident pages are assumed to be dirty. 6.004 Spring 2010 - 2 of 4 - Quiz #4 Problem 2 (continued): Gill’s crack software team has implemented the following handler for TLB misses, which has been thoroughly tested and works fine: void TLBMissHandler(int VPN) { if (NonResident(VPN)) PageFault(VPN); else { ppn = PageMa...
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This document was uploaded on 02/27/2014 for the course COMSCI 6.004 at MIT.

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