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A green light emitting diode led labeled power is

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Unformatted text preview: board common. A green light-emitting diode (LED) labeled POWER is illuminated when current is flowing from the 5-V DC regulated power source. Oscillator The UP 1 Education Board contains a 25.175-MHz crystal oscillator. The output of the oscillator drives the global clock input on the EPM7128S device (pin 83) and the global clock input on the EPF10K20 device (pin 91). JTAG_IN Header The 10-pin female plug on the ByteBlaster download cable connects with the JTAG_IN 10-pin male header on the UP 1 Education Board. The UP 1 Education Board provides power and ground to the ByteBlaster download cable. Data is shifted into the devices via the TDI pin and shifted out of the devices via the TDO pin. Table 1 identifies the JTAG_IN pin names when the ByteBlaster is operating in JTAG mode. 4 Altera Corporation University Program Design Laboratory Package User Guide Table 1. JTAG_IN 10-Pin Header Pin-Outs Pin JTAG Signal 1 TCK 2 GND 3 TDO 4 VCC 5 TMS 6 No Connect 7 No Connect 8 No Connect 9 TDI 10 GND Jumpers The UP 1 Education Board contains four three-pin jumpers (TDI, TDO, DEVICE, and BOARD) that set the JTAG configuration. You can set the JTAG chain for a variety of configurations (i.e., to program only the EPM7128S device, to configure only the EPF10K20 device, to configure/program both devices, or to connect multiple UP 1 Education Boards together). Figure 1 shows the positions of the three connectors (C1, C2, and C3) on each of the four jumpers. Figure 2. Position of C1, C2 & C3 Connectors TDI TDO DEVICE BOARD C1 C1 C1 C1 C2 C2 C2 C2 C3 C3 C3 C3 Table 2 defines the settings for each configuration. Altera Corporation 5 University Program Design Laboratory Package User Guide Table 2. JTAG Jumper Settings Desired Action TDI TDO DEVICE BOARD Program EPM7128S device only C1 & C2 C1 & C2 C1 & C2 C1 & C2 Configure EPF10K20 device only C2 & C3 C2 & C3 C1 & C2 C1 & C2 Program/configure both devices, Note (1) C2 & C3 C1 & C2 C2 & C3 C1 & C2 Connect multiple boards together, Note (2) C2 & C3 OPEN C2 & C3...
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  • Spring '14
  • Logic gate, Programmable logic device, Design Laboratory Package, Program Design Laboratory, University Program Design, Laboratory Package User

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