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Solution: 2 Z =X ·B 3. The clock and D waveforms are shown in the following ﬁgure for (i) a D latch with control, (ii) a negativeedge-triggered D-type ﬂip-ﬂop, and (iii) a positive-edge-triggered D-type ﬂip-ﬂop. Carefully sketch the output
Q for each device. For simplicity, assume there is no time lag in the output response.
D latch with
control D Q Q1
D-type ip- op D Q Q1
D-type ip- op 4. A sequential circuit has three D ﬂip-ﬂops, A, B, and C, and one...
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This document was uploaded on 03/01/2014 for the course ECE 25 at UCSD.
- Fall '08