Polysilicon 000000000000000000000000000000000000

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Unformatted text preview: 0000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 000000000000000000000000000000000000 0000 0000 0000 0000 00000 00000 00000 00000 00000 00000 00000 00000 00000 00000 Polysilicon Polysilicon Thin gate oxide 00000 n well p substrate ECEN 475 12.4 Self-Aligned Process Use oxide and masking to expose where n+ dopants should be diffused or implanted N-diffusion forms nMOS source, drain, and n-well contact 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000 00000 00000 0000 0000 0000 n well p substrate 22.4 ECEN 475 11 N-diffusion Pattern oxide and form n+ regions Self-aligned process where gate blocks diffusion Polysilicon is better than metal for self...
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This document was uploaded on 03/02/2014.

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