Unformatted text preview: n to
make these multipliers as simple as possible. An encoder using the ‘dual basis’
representation requires for implementation only a small number of integrated circuits or a
single VLSI chip.
Figure 53 illustrates the construction of shortened RS codewords using virtual fill. CCSDS 130.1G1 Page 53 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE TELEMETRY TRANSFER FRAME (Max=8920 bits) RS only
(no virtual fill) FRM HDR Ik
ASM.
32 bits TRAILER USER DATA (TLM PACKETS) (255,223) RS code
n=255
k=223 In
RS CHECK
SYMBOLS
1280 bits
for I=5 RS CODEBLOCK
1 to 5 times 223x8 bits
8920 bits for I=5 ASM. TRANSMITTED CODEBLOCK
10200 bits for I=5
TELEMETRY
TRANSFER
FRAME
8920 bits for I=5 TRANSMITTED
CODEBLOCK
10200 bits for I=5 RS Encoder RS Decoder
RS Dec.
Algorithm LOGICAL
CODEBLOCK
10200 bits for I=5 TRANSMITTED
CODEBLOCK
10200 bits for I=5 TELEMETRY
TRANSFER
FRAME
8920 bits for I=5 TELEMETRY TRANSFER FRAME 8800 bits RS only
(with virtual fill) FRM HDR Example, I=5:
120 bits fill = 8xQ
q =3
Q = 3x5 = 15
(252,220) shortened RS code TRAILER USER DATA (TLM PACKETS)
5k
5n
VIRTUAL
FILL
120
bits RS CODEBLOCK RS CHECK
SYMBOLS
1280 bits 8800 bits
LOGICAL CODEBLOCK
10200 bits 5 k Q
5 n Q
ASM. RS CODEBLOCK 32
bits 8800 bits RS CHECK
SYMBOLS
1280 bits ASM. TRANSMITTED CODEBLOCK
10080 bits
TELEMETRY
TRANSFER
FRAME
8800 bits 8920
bits
120 ‘0’
bits
added TRANSMITTED
CODEBLOCK
10080 bits 10200
bits RS Enc.
Algorithm RS Encoder 120 ‘0’
bits
deleted TRANSMITTED
CODEBLOCK
10080 bits
LOGICAL
CODEBLOCK 10200
bits
120 ‘0’
bits
added 8920
bits RS Dec.
Algorithm
RS Decoder 120 ‘0’
bits
deleted TELEMETRY
TRANSFER
FRAME
8800 bits Figure 53: Illustration of RS Codeword Structure, with and without Virtual Fill
5.3 INTERLEAVING OF THE REEDSOLOMON SYMBOLS When concatenated coding is used, or when the RS code is used without concatenation on a
bursty channel, interleaving of the RS code symbols improves code performance. Without
interleaving, burst error events would tend to occur within one RS codeword, and one
codeword would have to correct all of these errors. Thus over a period of time there would be a
tendency for some codewords to have ‘too many’ errors to correct (i.e., greater than E). The
purpose of interleaving and deinterleaving is to make the RS symbol errors, at the input of the
RS decoder, independent of each other and to distribute the RS symbol errors uniformly; in
other words, to distribute the burst errors among several codewords. The performance of the RS
decoder is severely degraded by highly correlated errors among several successive symbols.
Rectangular block interleaving of the RS symbols maximally spreads a burst of symbols with
errors over a number of codewords equal to the ‘interleaving depth’ I. The interleaving depth
is the number of RS codewords involved in a single interleaving and deinterleaving
operation. Interleaving and deinterleaving operations over a channel can be described
simply by considering two I×n matrices, one at the input of the channel and one at the output CCSDS 130.1G1 Page 54 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE (see figure 54). For interleaving, put the I codewords, each with length n, into rows 1,2,...,I
of the matrix, then transmit the symbols of columns 1,2,...,n through the channel. For deinterleaving, do the reverse operation.
n  2E INFORMATION SYMBOLS
1 I+1 2E CHECK
SYMBOLS RS WORD I RS WORDS 2 I+2 I 2I Figure 54: Matrix Used for Interleaving
Figure 54 illustrates the matrix used for interleaving I RS codewords (interleaving depth I).
Note that this matrix, by itself, does not specify in which order the input information symbols
should fill up the matrix cells not reserved for parity. If successive information symbols are
written into the matrix in the ‘natural’ ordering, row by row, so as to fill up codewords one at
a time, this requires holding I–1 full codewords before any of the columns of the matrix can
be read out. On the other hand, if successive information symbols are written into the matrix
column by column, there is no need to store the entire array of code symbols because each
column of I newly written symbols can be immediately read out as the next I symbols of the
RS codeblock, as soon as the encoder computes the (linear) contribution of each of these I
symbols to its corresponding set of RS parity symbols. This is equivalent to the method
specified in the Recommended Standard (reference [3]). One potential disadvantage of the
recommended method is that it spreads individual RS codeword errors across more source
blocks than the ‘natural’ ordering.
Interleaving of I RS codewords multiplies the length of the RS codeblock by I. The entire
package of I RS codewords constitutes one codeblock. However, it is customary to compute
WER for individual RS codewords rather than for the whole interleaved codeblock. The error
rate on the interleaved codeblock is the FER for CCSDS frames.
5.4 HARD ALGEBRAIC DECODING OF REEDSOLOMON CODES Unlike the ‘s...
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 Information Theory, ........., Error detection and correction, CCSDS

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