Ccsds 1301 g 1 page 6 8 june 2006 tm synchronization

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Unformatted text preview: d codes consisting of the non-shortened (255,223) RS code with E = 16 concatenated with any of the recommended punctured or non-punctured (7, 1/2) convolutional codes, with interleaving depth I = 5 (which gives a close approximation to ideal performance on the AWGN channel). CCSDS 130.1-G-1 Page 6-8 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE Figure 6-11:Bit Error Rate Simulated Performance of the CCSDS Concatenated Scheme with Outer E=8 Reed-Solomon Code (255,239) and Inner Punctured Convolutional Codes, Using Finite Interleaving with I=5 Figure 6-12:Word Error Rate Simulated Performance of the CCSDS Concatenated Scheme with Outer E=8 Reed-Solomon Code (255,239) and Inner Punctured Convolutional Codes, Using Finite Interleaving with I=5 CCSDS 130.1-G-1 Page 6-9 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE 7 7.1 TURBO CODES INTRODUCTION In 1993 a new class of concatenated codes called ‘turbo codes’ was introduced. These codes can achieve near-Shannon-limit error correction performance with reasonable decoding complexity. Turbo codes outperform even the most powerful codes known to date, but more importantly they are much simpler to decode. It was found that good turbo codes can come within approximately 0.8 dB of the theoretical limit at a bit error rate (BER) of 10-6. In applying this rule of thumb, it is important to keep in mind that the limiting performance depends on the code rate. A turbo code is a combination of two simple recursive convolutional codes, each using a small number of states. These simple convolutional codes are in fact ‘terminated’ convolutional codes and hence block codes. For a block of k information bits, each constituent code generates a set of parity bits. The turbo code consists of the information bits and both sets of parity, as shown in figure 7-1. P INFORMATION SIMPLE CODE 1 (Recursive Convol. code) PARITY 1 SIMPLE CODE 2 (Recursive Convol. code) PARITY 2 TURBO ENCODER CHANNEL k bits • SIMPLE DECODER 1 (APP ALGORITHM) DECODED INFORM ATION ITERATIONS SIMPLE DECODER 2 (APP ALGORITHM) TURBO DECODER Figure 7-1: Example of Turbo Encoder/Decoder The key innovation is an interleaver P, which permutes the original k information bits before encoding the second code. If the interleaver is well-chosen, information blocks that correspond to error-prone codewords in one code will correspond to error-resistant codewords in the other code. The resulting code achieves performance similar to that of Shannon’s well-known ‘random’ codes, but random codes approach optimum performance only at the price of a prohibitively complex decoder. Turbo decoding uses two simple decoders individually matched to the simple constituent codes. Each decoder sends likelihood estimates of the decoded bits to the other decoder, and uses the corresponding estimates from the other decoder as a priori likelihoods. The constituent decoders use the ‘APP’ (a posteriori probability) bitwise decoding algorithm, which requires the same number of states as the well-known Viterbi algorithm. The turbo decoder iterates between the outputs of the two decoders until reaching satisfactory convergence. The final output is a hard-quantized version of the likelihood estimates of either of the decoders. To achieve maximum performance, turbo codes use large block lengths and correspondingly large interleavers. The size of the interleaver affects buffer requirements and decoding delay, CCSDS 130.1-G-1 Page 7-1 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE but has little impact on decoding speed or decoder complexity. More recently, it was discovered that turbo codes with shorter blocks also perform amazingly well with respect to the theoretical performance bounds on codes constrained to have a given block length. Thus, turbo codes can also offer good performance for applications requiring small block sizes on the order of a few hundreds of bits (but these block sizes are not within the scope of the Recommended Standard (reference [3])). 7.2 TURBO ENCODER A turbo encoder is a combination of two simple encoders. The input is a frame of k information bits. The two component encoders generate parity symbols from two simple recursive convolutional codes, each with a small number of states. The information bits are also sent uncoded. An interleaver permutes bit-wise the original k information bits before input to the second encoder. A generic implementation block diagram for a turbo encoder is shown in figure 7-2. The specific turbo encoder in the CCSDS Recommended Standard (reference [3]) is shown in more detail in figure 7-3. frame clock (CLK) (k-bit blocks) Convolutional Encoder #1 (Terminated) Interleaver • • • Puncturer information bits Input Buffer Information bits CLK Convolutional Encoder #2 (Terminated) Output Buffer/Multplexer attached sync marker (ASM) encoded symbols (with attached sync markers) (Codeblock + ASM) • • • code parameters CLK CLK Parity CLK TURBO ENCODER Figure 7-2: Block Diagram of Turbo Encoder CCSDS 130.1-G-1 Page 7-2 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE out 0a Input Information Block ENCODERa in a INFORMATION BLOCK BUFFER • • + o 0 2 3 • G1 G2 G0 + 1 • • • + G3 4 • + + • • + out 2a + + out 1a + + + out 3a in b + o 0 1 2 3 • + = Exclusive OR G1 • G2 = Take every symbol G0 + • • • + +...
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This document was uploaded on 03/06/2014.

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