130x1g1e1

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Unformatted text preview: ures 7-6, 7-7, 7-8, and 7-9, show the simulated performance of the recommended turbo codes of rates 1/2, 1/3, 1/4, and 1/6, constructed for information block lengths of 1784, 3568, 7136, and 8920 bits. For all of the results in these figures, the decoder used a fixed-iteration stopping rule and stopped after 10 iterations. To achieve a bit error rate (BER) of 10-6, threshold bit-SNRs of approximately -0.1 dB, 0.15 dB, 0.4 dB , and 1.1 dB, are required by the turbo codes of rates 1/6, 1/4, 1/3, and 1/2, respectively. Approximately the same threshold bit-SNRs achieve a word error rate (WER) or frame error rate (FER) of 10-4 for these codes. (Note that WER = FER for the CCSDS turbo codes because the turbo code’s information block corresponds to one CCSDS frame). CCSDS 130.1-G-1 Page 7-7 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE 10 0 Block size = 1784 FER BER 1 10 - BER & FER 2 10 - Rate 1/3 3 10 - Rate 1/2 4 10 - Rate 1/6 Rate 1/4 5 10 - 6 10 -2 0. -0. 1 -0 0. 0. 1 0. 2 0. 3 0. 4 0. 5 0. 6 0. 7 0. 8 0. 9 1. 0 1. 1 1. 2 1. 3 1. 4 1. 5 1. 6 Eb/No (dB) Figure 7-6: BER and FER Performance for Rate 1/2, 1/4, 1/3 and 1/6 Turbo Codes with Block Size 1784 Bits, Measured from JPL DSN Turbo Decoder, 10 Iterations 10 0 Bock size = 3568 FER 1 10 - BER BER & FER 2 10 - 3 10 - 4 10 - rate 1/2 rate 1/4 5 10 - 6 10 -02 . rate 1/3 rate 1/6 -01 . -00 . 0. 1 0. 2 0. 3 0. 4 0. 5 0. 6 0. 7 0. 8 0. 9 1. 0 1. 1 1. 2 1. 3 1. 4 Eb/No (dB) Figure 7-7: BER & FER Performance for Rate 1/2, 1/4, 1/3 and 1/6 Turbo Codes with Block Size 3568 Bits, Software Simulation, 10 Iterations 6 6 Performance of hardware decoder not available. CCSDS 130.1-G-1 Page 7-8 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE 10 0 Block size = 7136 bits FER BER 1 10 - BER & FER 2 10 - 3 10 - Rate 1/2 Rate 1/3 4 10 - Rate 1/6 5 10 - Rate 1/4 6 10 -0 4 . -0 3 . -0 2 . -0 1 . -0 0 . 0. 1 0. 2 0. 3 0. 4 0. 5 0. 6 0. 7 0. 8 0. 9 1. 0 1. 1 1. 2 E b/No (dB) Figure 7-8: BER & FER Performance for Rate 1/2, 1/4, 1/3 and 1/6 Turbo Codes with Block Size 7136 bits, Software Simulation, 10 Iterations6 10 1 Bock size = 8920 10 0 FER 10 -1 BER 10 -2 BER & FER 10 -3 rate 1/3 rate 1/2 10 -4 rate 1/6 10 -5 10 -6 10 -7 rate 1/4 10 -8 10 -9 10 -10 -10 . -05 . 0. 0 0. 5 1. 0 1. 5 2. 0 E b /No (dB) Figure 7-9: BER & FER Performance for Rate 1/2, 1/4, 1/3 and 1/6 Turbo Codes with Block Size 8920 Bits, Measured from JPL DSN Turbo Decoder, 10 Iterations CCSDS 130.1-G-1 Page 7-9 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE Figure 7-10 shows the simulated performance of turbo codes of rates 1/2, 1/3, 1/4, and 1/6 with an information block length of 16384 bits. These performance curves do not necessarily reflect the performance of the CCSDS codes for this block length since the recommended interleaver for this block length has not been specified yet. 10 0 Bock size = 16384 1 10 - FER BER 2 10 - BER & FER 3 10 - rate 1/3 rate 1/2 4 10 - rate 1/6 rate 1/4 5 10 - 6 10 - 7 10 - 8 10 -4 0. -3 0. -2 0. -1 0. -0 0. 0. 1 0. 2 0. 3 0. 4 0. 5 0. 6 0. 7 0. 8 0. 9 1. 0 1. 1 1. 2 E b /No (dB) Figure 7-10:BER & FER Performance for Rate 1/2, 1/4, 1/3 and 1/6 Turbo Codes, Block Size 16384 Bits, Software Simulation, 10 Iterations Figure 7-11 illustrates how the decoder’s average speed can be increased through the use of stopping rules. Frame Error Rate = 10 -4 1784 1/3 1000 3 1784 1/2 3.3 Speed (Kbps) 800 3.75 8920 1/3 4.3 8920 1/6 600 5 6 Average Number of Iterations 1784 1/6 7.5 400 10 10 iterations fixed 200 15 -0.5 0 0.5 1 1.5 2 2.5 Eb /No (dB) Figure 7-11: Illustration of Decoder Speedup Using Stopping Rules CCSDS 130.1-G-1 Page 7-10 June 2006 TM SYNCHRONIZATION AND CHANNEL CODING —SUMMARY OF CONCEPT AND RATIONALE The x-axis shows the threshold value of Eb/N0 required to reach a WER of 10-4. The y-axis shows the average decoding speed, or reciprocally the average number of iterations. In this figure a decoder using a fixed 10 iterations achieves a speed of 300 Kbps, and the decoder’s average speed increases inversely as the average number of iterations is reduced by application of the stopping rule. The results in this figure are for a selection of recommended turbo codes with block lengths 1784 and 8920. The figure shows that effective stopping rules can increase the decoder speed on the order of 50% to 100% with virtually no compromise in the required value of Eb/N0; further increases in speed can also be obtained by trading off additional SNR for increased speed. 7.4.2 COMPARISON TO TRADITIONAL CONCATENATED CODES Turbo codes gain a significant performance improvement over the traditional Reed-Solomon and convolutional concatenated codes currently recommended by CCSDS. For example, to achieve an overall BER of 10-6 with a block length of 8920 bits (depth-5 interleaving), the required bit-SNRs are approximately 0.8 dB, 1.0 dB, and 2.6 dB for the DSN...
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This document was uploaded on 03/06/2014.

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