This preview shows page 1. Sign up to view the full content.
Unformatted text preview: lick the mouse to move to the next page.
Use the ESC key to exit this chapter. Tree Diagrams Each node on a tree
diagram represents a gate,
and the number of gate
inputs is written beside each
node. Figure 71: FourLevel Realization of Z
Figure 71: FourLevel Realization of Z Example
Find a circuit of AND and OR gates to realize
f (a, b, c, d) = Ʃ m(1, 5, 6, 10, 13, 14)
Consider solutions with two levels of gates and three levels of
gates. Try to minimize the number of gates and the total
number of gate inputs. Assume that all variables and their
complements are available as inputs.
First, simplify f by using a Karnaugh map. Figure 72: Section 7.1 (p. 191) ThreeLevel Realization of Z This leads
directly to a
twolevel ANDOR gate
circuit. Figure 73 Figure 74 Factoring yields
f = c′d(a′ + b) + cd′(a + b) Both of these solutions have an OR gate at the output. A
sol...
View
Full
Document
This document was uploaded on 03/16/2014 for the course EE 316 at University of Texas at Austin.
 Spring '08
 Brown
 Gate

Click to edit the document details