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Use the ESC key to exit this chapter. Tree Diagrams Each node on a tree
diagram represents a gate,
and the number of gate
inputs is written beside each
node. Figure 7-1: Four-Level Realization of Z
Figure 7-1: Four-Level Realization of Z Example
Find a circuit of AND and OR gates to realize
f (a, b, c, d) = Ʃ m(1, 5, 6, 10, 13, 14)
Consider solutions with two levels of gates and three levels of
gates. Try to minimize the number of gates and the total
number of gate inputs. Assume that all variables and their
complements are available as inputs.
First, simplify f by using a Karnaugh map. Figure 7-2: Section 7.1 (p. 191) Three-Level Realization of Z This leads
directly to a
two-level ANDOR gate
circuit. Figure 7-3 Figure 7-4 Factoring yields
f = c′d(a′ + b) + cd′(a + b) Both of these solutions have an OR gate at the output. A
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This document was uploaded on 03/16/2014 for the course EE 316 at University of Texas at Austin.
- Spring '08