Chapter 07 - Multilevel Logic-2x2(1)

# Consider for example the following nand nor circuit

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Unformatted text preview: )′ + (A + C′ + D)′]′ NOR-NOR = (A′B′C′ + A′BC + A′CD′)′ AND-NOR = (A′B′C′)′ • (A′BC)′ • (A′CD′)′ NAND-AND The other eight possible two-level forms are degenerate in the sense that they cannot realize all switching functions. Consider, for example, the following NAND-NOR circuit: Figure 7-11b: Eight Basic Forms for Two-Level Circuits From this example, it is clear that the NAND-NOR form can realize only a product of literals and not a sum of products. Section 7.3 (p. 199) Design of Minimum Two-Level NAND-NAND Circuits Design of Minimum Two-Level NAND-NAND Circuit Procedure for designing a minimum two-level NAND-NAND circuit: 1. Find a minimum sum-of-products expression for F. 2. Draw the corresponding two-level AND-OR circuit. 3. Replace all gates with NAND gates leaving the gate interconnection unchanged. If the output gate has any single literals as inputs, complement these literals. F = l1 + l2 + • • • + P...
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## This document was uploaded on 03/16/2014 for the course EE 316 at University of Texas at Austin.

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