The bubble in a pipeline for us instruction which

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Unformatted text preview: 0.1 buckets per second.. Much better –  Whats more: you can increase bandwidth: •  Just make more lines of bucket brigade •  This is the same idea behind an assembly line cs420: speed with complexity 13 Pipelined Processor Source: wikipedia Pipelined processor •  Allows us to reduce the clock period –  Since long gate delay (critical paths) are reduced •  But assumes we can always pipeline instructions •  What can disturb a pipeline? •  http://www.youtube.com/watch?v=EuMgRN2Atvk cs420: speed with complexity 15 Pipelined processor •  Allows us to reduce the clock period –  Since long gate delay (critical paths) are reduced •  But assumes we can always pipeline instructions •  What can disturb a pipeline? •  The bubble in a pipeline: –  For us: instruction which needs a result calculated by a previous instruction –  Branches and Jumps cs420: speed with complexity 16 Avoiding pipeline bubbles •  Data forwarding: –  In addition to storing the result in a register, forward it to the next instruction (store it in a buffer) •  Branch prediction! –  Separate hardware units that track of branches, statistics, and predict which way a branch will go! –  E.g. a loop : branch will go back in allcases, except the last cs420: speed with complexity 17 Floa3ng point numbers •  Integers or `ixed point numbers don’t provide a large dynamic range (smallest magnitude to largest) •  32.178, 0.74*10^5, 0.39*10^( ­7) •  But addition, multiplication, division is much more complex.. •  Pipelined `loating point unit! cs420: speed with complexity 18 The biggest impediment: memory •  Large capacity memory is much slower than ALUs or registers •  DRAM is high density (just one capacitor per bit, plus a bit more circuitry) –  But slow, and the speed has not increased much over the years –  30 ­50 ns cs420: speed with complexity 19 Caches and Cache Hierarchies •  Use a faster but smaller memory in addition to DRAM cs420: speed with co...
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