HW7Solutions

# HW7Solutions - ECE15A Winter2014 HW7Solutions 1 Dcml eia...

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ECE 15A Winter 2014 HW7 Solutions 1. Decimal Input x y w z A msb B C D lsb Decimal Output 0 0 0 0 0 1 1 1 0 0 0 1 1 2 2 0 0 1 0 1 1 3 3 0 0 1 1 1 2 4 0 1 0 0 1 1 5 5 0 1 0 1 1 4 6 0 1 1 0 1 1 5 7 0 1 1 1 1 8 8 1 0 0 0 1 1 9 9 1 0 0 1 1 8 10 1 0 1 0 1 1 9 11 1 0 1 1 1 1 12 12 1 1 0 0 1 1 1 11 13 1 1 0 1 1 1 1 14 14 1 1 1 0 1 1 1 1 15 15 1 1 1 1 0 Output A xy col wz row 00 01 11 10 00 1 01 1 1 11 1 1 10 1 1 1 y’wz’+xwz’+x’ywz+xyw’+xy’z

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ECE 15A Winter 2014 HW7 Solutions Output B xy col wz row 00 01 11 10 00 1 01 1 1 11 1 10 1 1 x’w’+yw’z+ywz’+xy’wz Output C xy col wz row 00 01 11 10 00 01 1 11 1 1 10 1 1 1 wz’+z’x’y’+xwz’ Output D xy col wz row 00 01 11 10 00 1 1 1 1 01 11 10 1 1 1 1 z’
ECE 15A Winter 2014 HW7 Solutions

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ECE 15A Winter 2014 HW7 Solutions 2. 5 input majority circuit inputs abcde input e=0 ab col cd row 00 01 11 10 00 01 1 11 1 1 1 10 1 input e=1 ab col cd row 00 01 11 10 00 1 01 1 1 1 11 1 1 1 1 10 1 1 1 cde+abe+abd+abc+bcd+acd+bde+bce+ade+ace
ECE 15A Winter 2014 HW7 Solutions 3. If the msb is 1 the number is negative so flip and add 1. Half adder: add 2 bits and get a sum representing the new bit and a carry that carries over into the next more significant bit. Half adder a b sum carry 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1

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ECE 15A Winter 2014 HW7 Solutions 4. (w+y’)’+((xy’)+(yz))’ xy col zw row 00 01 11 10 00 1 1 1 0 01 1 1
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