G gds id eecs 240 lecture 2 cmos passive devices 2006

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Unformatted text preview: µm 100 0.5µm 50 0 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 V G S -V TH [ V] Peak performance for low VGS-VTH (V*) EECS 240 Lecture 2: CMOS - passive devices © 2006 A. M. Niknejad and B. Boser 26 Output Resistance ro Hopeless to model this with a simple equation (e.g. gds = λ ID) EECS 240 Lecture 2: CMOS - passive devices © 2006 A. M. Niknejad and B. Boser 27 Open-loop Gain av0 • More useful than ro • Represents maximum attainable gain from a transistor • • • • Simulation Notes: Use feedback to bias Vds = Vgs Use relatively small gain (100) for Fast DC conversgence EECS 240 Lecture 2: CMOS - passive devices © 2006 A. M. Niknejad and B. Boser 28 Gain, av0 = gm ro L = 0.18µm • Strong tradeoff: av0 versus VDS range • Create such plots for several device length’ for design reference EECS 240 Lecture 2: CMOS - passive devices © 2006 A. M. Niknejad and B. Boser 29 Long Channel Gain L = 0.35µm L av0 like long channel device EECS 240 Lecture 2: CMOS - passive devices © 2006 A. M. Niknejad and B. Boser 30 Technology Trend 80 0.5µm 70 0.35µm 60 gm⋅ro 50 0.25µm 40 0.18µm 30 20 10 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VDS [V] Short channel devices suffer from reduced per transistor gain EECS 240 Lecture 2: CMOS - passive devices © 2006 A. M. Niknejad and B. Boser 31 Transistor Gain Detail 45 40 0.5µm 35 g m⋅ r o 30 0.35µm 25 0.25µm 20 15 0.18µm 10 5 0 0.0 0.1 0.2 0.3 0.4 VDS [V] For practical VDS the effect the “short-channel” gain penalty is less severe (remember: worst case VDS is what matters!) EECS 240 Lecture 2: CMOS - passive devices © 2006 A. M. Niknejad and B. Boser 32 Saturation Voltage vs V* • Saturation voltage – Minimum VDS for “high” output resistance – Poorly defined: transition is smooth in practical devices • “Long channel” (square law) devices: – VGS – VTH = Vdsat = Vov = V* – Significance: • • • • • • Channel pinch-off ID ~ V*2 Boundary between triode and saturation ro “large” for VDS > V* CGS, CGD...
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