Lab 7 - FL13 - ECE 198 JL - University of Illinois - Engineering Wiki

Volodymyr kindratenko says oc t 08 you c an us e 3

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Unformatted text preview: myr Kindratenko says: Oc t 08 You c an us e 3-input gates as well. Limit y our des ign to 2-level c irc uit. In Lab 8 y ou will build this c irc uit us ing 2to 4- input gates . W illiam Schellhorn says: Oc t 08 If we implement the c irc uit c ompletely in NAND gates , does our implementation of the inverter c ount as another level? Volodymyr Kindratenko says: Oc t 08 No. You c an us e NOT gates in the NAND-bas ed implementation though. Kevin Kong Zhi Yao says: Cant s imulate bec uas e of this ... Reading /s oftware/mentor/ModelSim-SE-10.1d/modeltec h/tc l/vs im/ l Error in s tartup s c ript: unmatc hed open brac e in lis t while ex ec uting "GUIMAIN" invok ed from within " if Unk nown mac ro: {[batc h_mode]} { BATCHMAIN } els e { GUIMAIN }" invok ed from within "nc Fy P12 -+ " (file "/s oftware/mentor/ModelSim-SE-10.1d/modeltec h/linux /../tc l/vs im/vs im" line 1) ** Fatal: Read failure in vlm proc es s (0,0) /s oftware/mentor/ModelSim-SE-10.1d/modeltec h/linux /vs im returned s tatus 1 Geoffrey Herman says: Oc t 08 Oc t 10 If y ou get this error, try navigating to y our home direc tory...
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This document was uploaded on 03/22/2014.

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