Lab 5 - FL13 - ECE 198 JL - University of Illinois - Engineering Wiki

If y ou c lic k on the waveform a y ellow line will

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Unformatted text preview: ther your cir cuit behaves cor r ectly. Compare y our waveform to the truth table for the XOR func tion. If y ou c lic k on the waveform, a y ellow line will appear indic ating what time y ou are evaluating. On the left hand s ide in the s ec ond c olumn, y ou c an s ee the numbers 0 and 1, thes e numbers tell y ou the value of the s ignal at the time indic ated by the y ellow line. If y ou s ee any other s y mbols bes ides 0 or 1, y ou may have not have c onnec ted a wire c orrec tly . a b f = a XOR b 000 011 101 110 In the waveform, we c an s ee that for 0-10 ns , the values of a, b , and f are all 0 (a= 0, b= 0, f= 0). This behavior matc hes the firs t row of our truth table. W e c an s ee that for 10-20 ns , a = 0, b= 1, f= 1. This behavior matc hes the s ec ond row of our truth table. W e c an s ee that for 20-30 ns , a = 1, b= 0, f= 0. This behavior does not matc h the third row of our truth table! W e c an s ee that for 30-40 ns , a = 1, b= 1, f= 1. This behavior does not matc h the fourth row of our truth table! Debugging and cor r ecting your cir cuit From this c omparis on, we c an s ee that our c irc uit does not behave c orrec tly . W e c an debug our c irc uit by us ing determining the Boolean ex pres s ions for our des ired XOR func tion and what the waveform s hows that we implemented. The XOR func tion: f = a'b + ab ' Our waveform func tion: f = a'b + ab This analy s is s hows us that one of the AND gates in our c irc uit has the wrong inputs . W e need to c hange the a AND b gate to be an a AND b ' gate. 1. Correc t y our my _x or c irc uit. Clos e models im and open y our my _x or c irc uit s c hematic . Add an inverter after the b input port s o that we c an c reate our a AND b ' gate and rec onnec t the wires as s hown. Mak e s ure that y our input ports are all s till named c orrec tly . W hen y ou are done mak ing y our c orrec tions , generate a new HDL c onfiguration. 2. Res imulate y our c irc uit. Save and c los e y our s c hematic and reopen models im. Add the a, b , and f s ignals lik e y ou did before, and then ty pe do m y_x or.do and then run 40 to ex ec ute y our s imulation again. 3. Double c hec k y our s imulation Your s imulation s hould now look lik e the following figure. Lab 5 assignment This pa rt conta ins w ha t you ne e d to turn in a s your La b 5 a ssignm e nt. In this portion, we will us e y our my _x or c irc uit to build a more c omplic ated c irc uit c alled the full adder. The full adder is one c omponent we c an to us e to add uns igned binary numbers together. In binary addition, we need c reate both a s um output bit and a c arry output bit. To better unders tand the roles of thes e bits , think about regular dec imal addition. If we add 5+ 7, we would get a s um digit of 2 in the ones plac e and we would c arry a 1 into the tens plac e to get the number 12. Similarly , if we add 1+ 1 in binary , we would get a 0 in the ones plac e and we would c arry a 1 to the twos plac e to get the number 10 (2 in dec imal). The full adder adds three input bits together:...
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