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Unformatted text preview: CC, s o wouldn't the load s ignal already be s et to 1? W ould we s till need to forc e the load s ignal to be 1. Oc t 26 W enjia Zhou says: If y ou have LOAD as an input, then y ou have to s pec ify the value in the do file. But if y ou c onnec t to the VCC,
then don't have to. Oc t 27 Georgi Iliev says: Sinc e one of the s ignals c an be jus t a direc t input, c an we omit it from the Nex t-s tate-logic bloc k ,( I am mak ing it as
a s eparate unit). The problem I am having is that if I jus t c onnec t an in port to an out port they s hare the s ame name,
s o onc e I get to implement it it only s hows as an in-port. Oc t 27 W enjia Zhou says: See Prof.Herman's c omment above. Oc t 27 Georgi Iliev says: Thank s y ou. Oc t 27 Nicholas Allen says: W henever I try to s imulate my des ign I get this error in the log window:
Compilation c annot proc eed: The HDL file that s hould be generated from
/home/nmallen2/ec e198jl/HDS/lab9/lab9_lib/hds / (s t at e)logic / s t ruc t . bd is not available I tried s imulating des igns from previous labs that have work ed before and they no longer work either. W enjia Zhou says: Oc t 27 c an y ou open y our bloc k diagram? Did y ou regenerate the vhdl for the diagram? Nicholas Allen says: Oc t 27 I c an open the bloc k diagram and I did regenerate the vhdl. I made it to work s o that it now generates the
main des ign by jus t putting the nex t-s tate logic ins ide the des ign rather than having its own file. So now
the ModelSim opens but it s ay s :
# ** Error: Failed to find des ign unit lab7_lib.VendingLab9(s truc t).
# Optimiz ation failed
# Error loading des ign
And when I regenerate the vhdl for the diagram it s ay s generation c ompleted with errors .
Error: VendingLab9_s truc t_c onfig.vhd already ex is ts , but is not in the Data Model
Error: vendingNAND_s truc t_c onfig.vhd already ex is ts , but is not in the Data Model Hemant Raw at says: Oc t 27
Im having s ome trouble with the .do file. W henever I forc e T to be 1 at any time interval its alway s z ero for the entire
duration of 200 ns whenver I run it. W enjia Zhou says: Oc t 27 Did y ou get any error mes s age after y ou ty pe the do **.do ? Hemant Raw at says: Oc t 27 I get this on the trans c ript
# // ModelSim SE 10.1d Nov 1 2012 Linux 2.6.32-358.23.2.el6.x 86_64
# // Copy right 1991-2012 Mentor Graphic s Corporation
# // All Rights Res erved.
# // THIS W ORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
# // W HICH IS THE PROPERTY OF M...
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This document was uploaded on 03/22/2014.
- Fall '14