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Unformatted text preview: ging it to /c lk it was the only s ignal funtioning properly before and it s tay ed the s ame
with the /c lk W enjia Zhou says: Oc t 27 ..........Pleas e res tart y our s imulation. Chec k Mentor Graphic s FAQ page. Hemant Raw at says: Oc t 27 I feel dumb thank y ou for telling me to res tart the s imulation its work ing now thank s again for
helping me out W enjia Zhou says: Oc t 27 lol, jus t pay attention to the error mes s age nex t time. They are des igned to be us eful. Hemant Raw at says: Oc t 27 will do thank s again Dominic Baratta says: Oc t 27 Are the outputs for the s tate diagram inc orrec t for s tates 011 and 111?? W hy would y ou ac c ept a c oin and dis pens e
a produc t for either of thes e s tates when both s tates are "No money has been ins erted y et." This would c aus e y our
vending mac hine to c ons tantly s it there dis pens ing produc ts ... W enjia Zhou says: Oc t 27 You are right. I think the reas on of this is probably to give a nic e Kmap with les s terms when this problem was
firs t des igned.. Nicholas Allen says: Oc t 27 I k eep getting this error:
# ** Error: Failed to find des ign unit lab7_lib.FinalStruc ture(s truc t).
# Optimiz ation failed
# Error loading des ign
I have tried remak ing my diagram a c ouple of times and moving the folder to be where other folders in the s ame
library that work are. W enjia Zhou says: Oc t 27 Moving direc tories is probably not good. Try move it bac k , and reload library (c hec k Mentor Graphic s FAQ).
If that does not s olve the problem, I would s tart over with a brand new projec t and only c opy my s truc t over to
the new projec t, not moving files .. Nicholas Allen says: Oc t 27 I c reated a new projec t and c opied the s truc ture. Now the Simulator window will not open and I get the s ame error as
I had before in the log window when I try to s imulate it:
Compilation c annot proc eed: The HDL file that s hould be generated from
/home/nmallen2/ec e198jl/HDS/Lab9Attempt5/Lab9Attempt5_lib/hds / (vending)attempt11/s truc t.bd is not available
Als o moving it bac k and reloading the library did not work either W enjia Zhou says: Oc t 27 Pleas e pos t y our output when y ou generate y our VHDL file. Nicholas Allen says: Simulation direc tory is s et to /home/nmallen2/ec e198jl/HDS/lab7/lab7_lib/work
Performing c onfiguration generation on s elec tion...
Lab9Attempt5_lib/VendingAttempt11 Oc t 27 Generat...
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- Fall '14