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Unformatted text preview: he s tate s tored in the flip-flops while input T= 0. W hen a quarter is ins erted, it will roll and bloc k the T s ens or c reating a 1, and then moments later it will briefly and s imultaneous ly
bloc k the c loc k s ens or c reating a c loc k puls e. Cons equently , the c oin s lot will s end a c loc k puls e s ignal that will update the s tate
s tored in the flip-flops while input T= 1. To s imulate this behavior in ModelSim, y ou will need to c reate a .do file that mimic s the behavior des c ribed above. After
implementing y our c irc uit and s tarting ModelSim, c reate and open inse rtcoins.do.
Initializ e the values of y our flip-flops to s tate "ex tra2" by forc ing rst to 0 and se t to 1 the firs t 5 nanos ec onds (ns ) of y our
s imulation. You will als o want to initializ e T and clk to 0 to s tart. At 6 ns , forc e se t to 0.
Set the loa d s ignal to 1 for the duration of the s imulation s o that y our D flip-flop res ponds to the c loc k input.
To s imulate a c oin being ins erted, we will as s ume that it tak es 10 ns for a c oin to roll pas t a s ens or. W e will als o as s ume
that the quarter will roll in front of the T s ens or 5 ns before it rolls in front of the c loc k s ens or. For ex ample, if a quarter is
ins erted at 20 ns , the T s ens or will bec ome a 1 at 20 ns and will return to a 0 at 30 ns . Similarly , the c loc k s ens or will
bec ome 1 at 25 ns and will return to a 0 at 35 ns for the s ame quarter. Read the nex t s ec tion before writing y our .do file.
Complete y our inse rtcoins.do file by s imulating the following s equenc e of c oins (as s uming a very fas t human who is
apparently very thirs ty or hungry )
Quarter ins erted at 20 ns .
Quarter ins erted at 40 ns .
Quarter ins erted at 60 ns .
Dime ins erted at 80 ns .
Dime ins erted at 100 ns .
Dime ins erted at 120 ns .
Quarter ins erted at 140 ns . Dime ins erted at 160 ns .
Quarter ins erted at 180 ns .
Add at leas t the t, clk, rst, se t, A, and P s ignals to y our waveform. It may als o be helpful to add the s ignals that c orres pond
to the outputs of y our flip-flops for debugging purpos es .
Run y our s imulation for 200 ns , and c hec k whether y our c irc uit demons trates the des ired behavior. If it does not, debug and
res imulate y our c irc uit. Simulating periodic (repetitiv e) signals like the clock
Bec aus e the c loc k is periodic , y ou c an us e the -r...
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This document was uploaded on 03/22/2014.
- Fall '14