Lab 15 - FL13 - ECE 198 JL - University of Illinois - Engineering Wiki

Ird cond20 and j50 c ontrol whic h s tate the c ontrol

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: ble. CAR tells us whic h addres s in memory to look at depending on whic h s tate the c ontrol unit is in. For ex ample, when we are in s tate 1, we want to look at memory addres s 1. IRD, COND[2:0], and J[5:0] c ontrol whic h s tate the c ontrol unit will go to nex t. The LDSignals c ontrol whic h regis ters will update on the nex t c loc k c y c le. The GateSignals c ontrol whic h information is permitted onto the s y s tem bus . The Mux Signals c ontrol the various multiplex ers in the LC3. The ALUK c ontrols whic h operation the ALU performs . Finally , the IO c ontrol the us er inputs and memory . Eac h c olumn in the bottom row repres ents 1 bit of the c ontrol word. For ex ample, J[5:0] is c ompos ed of 6 bits . In the c ontex t of this lab, the s ignals whic h are as s igned "0" or "x " are s ignals that y ou will never need to modify bec aus e they are bey ond the s c ope of the c ours e. Clos e ModelSim and open the CPU c omponent in the Des ign Brows er Double-c lic k on the c ontrol c omponent in the CPU to open it. Ins ide the c ontrol c omponent is another c omponent c alled "ControlStore". Double-c lic k on ControlStore to open a tex t file c alled "bads tore.vhd". This file defines how the Control Rom work s . If the file does not open, or there is a warning about "no default view", no as s oc iated view", or "no file", c lic k c anc el and ins tead rightc lic k on the "ControlStore" and Open As -> b ads tore(VHDL_TEXT) Sc roll down until y ou s ee the c ontents of the ROM (s ee the image below). The c ontents of the ROM are grouped lik e the table above. Sinc e we want to edit the State 1 (the ADD ins truc tion), we will edit the ROM word at mem(1). Loc ate whic h bit in mem(1) c orres ponds to the bit for LD.REG and c hange it to a 1 lik e we determined in the previous s ec tion. Your Control Rom s hould now look lik e the image below. Save "bads tore.vhd" Finish debugging Return to the Des ign Manager and s tart the s...
View Full Document

This document was uploaded on 03/22/2014.

Ask a homework question - tutors are online