0 benchmark b3 cmove100 r1 loop ldr31 10244 r0 ldr31

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Unformatted text preview: , LOOP) HALT() .=0 || Benchmark B3 CMOVE(100, R1) LOOP: LD(R31, 1024+4, R0) LD(R31, 1024+8, R0) LD(R31, 1024+12, R0) SUBC(R1, 1, R1) BNE(R1, LOOP) HALT() .=0 || Benchmark B4 CMOVE(100, R1) LOOP: LD(R31, 1024+4, R0) LD(R31, 1024+8, R0) LD(R31, 1024+12, R0) LD(R31, 1024+16, R0) SUBC(R1, 1, R1) BNE(R1, LOOP) HALT() (A) (1 point) Which benchmark yields the best hit ratio with cache C1? (circle one): B0 … B1 … B2 … B3 … B4 (B) (2 points) Select the value that best approximates the hit ratio with cache C1 on Benchmark B1. (select approx hit ratio): 0% … 25% … 50% … 75% … 100% (C) (2 points) Which cache yields the best hit ratio with benchmark B3? (circle one): C1 … C2 … C3 (D) (2 points) Which cache, if any, yields a hit ratio of zero (0%) with benchmark B4? (circle one): C1 … C2 … C3 … NONE 6.004 Spring 2009 - 2 of 4 - Quiz #4 Problem 3 (8 points): Memory Systems A simple computer system using the Beta processor has memory components as diagrammed below: MMU (P a g e M a p ) CPU M a in M e m o ry Cache RAM Some parameters of the system include: Cache design: Direct mapped, 4-byte (1 word) bl...
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This document was uploaded on 03/17/2014 for the course ELECTRICAL 6.004 at MIT.

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