ph_ch4_P1 - CoE3DR4 Computer Organization Chapter 4...

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CoE3DR4Computer OrganizationChapter 4
IntroductionPerformance of a machine is determined by three factors:instruction count, clock cycle time, and clock cycles perinstruction (CPI)The complier and ISA determine the instruction countrequired for a given programClock cycle time and number of CPI are determined byprocessor implementationIn this chapter we construct the datapath and control unit fortwo different implementation of MIPS instruction set
IntroductionThe datapath is the interconnection of the components that make up theprocessor.The datapath must provide connections for moving bits between memory,registers and the ALU.The control is a collection of signals that enable/disable the inputs/outputsof the various components.You can think of the control as the brain, and the datapath as the body.the datapath does only what the brain tells it to do.We will implement a subset of core MIPS :lw and swadd, sub, and, or and sltbeq and jEffect of different implementation choices on clock rate and CPI
Implementation overviewTwo identical first step for every instruction1.Send PC to memory and fetch the instruction from thatlocation2.Read one or two registers, selected by fields of instructionopcode (one register for lw, two for most of the otherinstructions)Perform the actions to accomplish the instructionActions are largely the same, independent of exact opcodeHolds for each instruction class: memory reference, arithmetic-logic,and branch
Implementation overviewAll instruction classes (except jump) use ALU after readingregistersMemory reference instructions use ALU for address calculationsArithmetic-logic instructions use ALU for operation executionBranch instructions use ALU for comparisonPost-ALU execution of instructionsMemory-reference instruction needs to access memory for load orstoreArithmetic-logic instruction must write data to a registerBranch instruction needs to change the PC for next instruction addressbased on comparisonFigure 4.1High level view of a MIPS implementation
Implementation overview
Implementation overviewTwo important aspects of instruction execution are missing:1. Data going to a particular unit is coming from two sourcesWe have to use multiplexerControl lines of the multiplexers are set based on information takenfrom the instruction being executed2. Several of the units must be controlled depending on thetype of instructionExample: data memory must read on a load and write on a storeExample: ALU must perform one of several operationsThese operations are directed by control lines that are set onthe basis of various fields in the instruction
Implementation overview
Implementation overviewA control unit that has the instructions as an input is used todetermine how to set the control lines for the functional unitsand two of the multiplexers

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Term
Spring
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Central processing unit

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