Lecture Notes_23-26_MOSFET_2014

On the other hand the gate voltage relative to vdd in

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Unformatted text preview: VDS in the equation in Slide 16 results in the drain saturation current. ID vs. VDS for a depletion- mode n- channel MOSFET. Note that at zero gate bias, there is current due to inversion charges. One can use ID vs. VDS curves in the linear or saturation regime to find the mobility of the inversion electrons. In the figure for Saturation regime, which transistor, A or B, is enhancement mode? The answer is A because at zero gate bias there is no current and the threshold voltage is positive for this n- channel MOSFET. For transistor B, there is current with gate voltage. 4 types of MOSFET: n- channel enhancement mode, n- channel depletion mode; same for p- channel. Complementary MOSFET, or CMOS, is the building block of integrated circuits. Two enhancement- mode MOSFETs, p- channel and n- channel, are connected in series; gates are connected and drains are connected. VDD is relatively large, positive, and 2 22 23 24 25 it is connected to the Source of PMOSFET. When the input VI is low (zero), the gate voltage to the NMOSFET is less than the threshold voltage and NMOSFET is off. On the other hand, the gate voltage relative to VDD in the PMOSFET is negative and more so than the threshold voltage....
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This note was uploaded on 04/01/2014 for the course ECE 103 taught by Professor Wang during the Winter '08 term at UCSD.

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