Accesses even though time needed for one memory

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Unformatted text preview: ry accesses! accesses! Even though time needed for one memory access is tripled, caching permits performance to remain reasonable. Suppose TLB access time is 20 ns, 100 ns to memory (no parallelism) Cache hit rate of 98 percent yields: effective access time = 0.98 x 120 + 0.02 x 320 = 124 nanoseconds. which is only a 24 percent slowdown in memory access time. Can add more page tables and can show that slowdown grows slowly: 3-level: 26 % 4-level: 28% Inverted Inverted Page Table Page Page table size is based on size of logical address space – this can be very large and bigger than the actual memory consumed by a process Problem: Problem: may need a worst-case page table size to accommodate the *possibility* that a process accesses any and all addresses within its virtual address space and do this for many processes! Instead let the page table entries map directly each real page of memory only 1 page table in the system to map all of physical memory Inverted Inverted Page Table (cont’d) PTE consists of the virtual address of the page stored in that real memory location, with information about the process that owns that page: <pid, page-number> VA: <pid, page-number, offset> Decreases memory needed to store each page table, but increases time needed to search the table when a page reference reference occurs. Use hash table to limit the search to one — or at most a few — page-table entries. Better yet use a TLB caching scheme Inverted Inverted Page Table Architecture How to guarantee unique pid? Less Less compatible with virtual memory (expensive to learn that a page is not allocated) Shared Shared Pages Shared code • One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems, shared libraries) Private code and data • Each process keeps a separate copy of the code and data Shared Shared Pages Example Segmentation Segmentation Memory-management scheme that supports user view of memory. A program is a collection of segments. A segment is a logical unit such as: main program, procedure/function, local local variables, global variables, stack, symbol table Logical Logical View of Segmentation 1 4 1 2 3 4 2 3 user space physical memory space Segmentation Segmentation Architecture Logical address consists of a two tuple: <segment-number, offset>, Segment table – maps physical addresses; each table entry has: • base – contains the starting physical add...
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This document was uploaded on 04/02/2014.

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