EXAM 2-solution

# Insteadf2heref3adcanbe f1 f1 b b used f f d d f3 f3 a

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Unformatted text preview: ircuit for minimal two level OR‐AND implementation  c  F’=bd’+ab’d ⇒ F=(b’+d)(a’+b+d’)  cd  F’:  00  01  11  10  b'  ab  F  d          x   00   x        a’  x     1   01   x  b   b    d’   x   x  11   1           a        1   1  x   10     d    c) Draw the circuit for minimal implementation using one EX‐OR gate (no restriction on the  number of inputs) and other gates necessary  c  c  c  F1:  cd  F2:  F1+F2:  cd  cd  00  01  11  10  00  01  11  10  00  01  11  10  ab  ab  ab        1  00   1  1  1   1  00   1  1   1  1  00  1               1  1     0...
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## This test prep was uploaded on 04/06/2014 for the course EEE 348 taught by Professor Gozdeakar during the Summer '11 term at Middle East Technical University.

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