Homework 7 Solution

2ms4us 800 clock cycles and name lab section 3 02

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Unformatted text preview: With a clock prescaler factor of 64, how long is the duration in clock cycles for a start bit, a data bit of value 1, a data bit of value 0, and an idle interval between those bits? Allow 0.2ms error margin, e.g. a start bit can be 3 ±0.2ms. Ans: Clock frequency with a prescaler of 64 = ((16*10^6)/64) = 250000Hz Time taken for one cycle = 1/250000 = 4us i)Duration of a start bit = 3ms/4us = 750 clock cycles Taking error into consideration the duration of the start bit can be any value between 3+0.2 = 3.2ms, 3.2ms/4us = 800 clock cycles and Name: Lab Section: 3- 0.2 = 2.8ms, 2.8ms/4us = 700 clock cycles ii)Duration of a data bit of value 1 = 2ms/4us = 500 clock cycles Taking error into consideration the duration of the data bit of value 1 can be between 2+0.2 = 2.2ms, 2.2ms/4us = 550 clock cycles and...
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