Codes explicit sexng test singlebit registers cf carry

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Unformatted text preview: ect) by arithmeMc operaMons Example: addl/addq Src,Dest ↔ t = a+b   CF set if carry out from most significant bit (unsigned overflow)   ZF set if t == 0   SF set if t < 0 (as signed)   OF set if two’s complement (signed) overflow (a>0 && b>0 && t<0) || (a<0 && b<0 && t>=0) Not set by lea instrucMon (beware!)   Full documentaMon (IA32): hyp://www.jegerlehner.ch/intel/IntelCodeTable.pdf   x86 University of Washington CondiMon Codes (Explicit Sexng: Compare)   Single ­bit registers CF Carry Flag (for unsigned) ZF Zero Flag   SF Sign Flag (for signed) OF Overflow Flag (for signed) Explicit Sexng by Compare InstrucMon cmpl/cmpq Src2,Src1 cmpl b,a like compuIng a-b without serng desInaIon   CF set if carry out from most significant bit (used for unsigned comparisons)   ZF set if a == b   SF set if (a-b) < 0 (as signed)   OF set if two’s complement (signed) overflow (a>0 && b<0 && (a-b)<0) || (a<0 && b>0 && (a-b)>0) x86 University of Washington CondiMon Codes (Explicit Sexng: Test)   Single ­bit registers CF Carry Flag (for unsigned) ZF Zero Flag   SF Sign Flag (for signed) OF Overflow Flag (for signed) Explicit Sexng by Test instrucMon testl/testq Src2,Src1 testl b,a like compuIng a & b without serng desInaIon   Sets condiIon codes based on value of Src1 & Src2   Useful to have one of the operands be a mask   ZF set if a&b == 0   SF set if a&b < 0   testl %eax, %eax   Sets SF and ZF, check if eax is +,0, ­ x86 University of Washington Reading CondiMon Codes   SetX InstrucMons   Set a single byte to 0 or 1 based on combinaIons of condiIon codes SetX sete setne sets setns setg setge setl setle seta setb CondiMon ZF ~ZF SF ~SF ~(SF^OF)&~ZF ~(SF^OF) (SF^OF) (SF^OF)|ZF ~CF&~ZF CF DescripMon Equal / Zero Not Equal / Not Zero NegaMve NonnegaMve Greater (Signed) Greater or Equal (Signed) Less (Signed) Less or Equal (Signed...
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